Issued Patents All Time
Showing 26–50 of 57 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9263782 | Notch filter structure with open stubs in semiconductor substrate and design structure | Hanyi Ding, Anthony K. Stamper | 2016-02-16 |
| 9257324 | Forming structures on resistive substrates | Alan B. Botula, James S. Dunn, Jeffrey P. Gambino, Douglas B. Hershberger, Alvin J. Joseph +2 more | 2016-02-09 |
| 9245951 | Profile control over a collector of a bipolar junction transistor | David L. Harame, Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2016-01-26 |
| 9231074 | Bipolar junction transistors with an air gap in the shallow trench isolation | Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater, Anthony K. Stamper | 2016-01-05 |
| 9224858 | Lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a below source isolation region and a method of forming the LDMOSFET | Santosh Sharma, Yun Shi, Anthony K. Stamper | 2015-12-29 |
| 9219128 | Methods of fabricating bipolar junction transistors with reduced epitaxial base facets effect for low parasitic collector-base capacitance | David L. Harame, Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2015-12-22 |
| 9159817 | Heterojunction bipolar transistors with an airgap between the extrinsic base and collector | Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater, Anthony K. Stamper | 2015-10-13 |
| 9159801 | Bipolar junction transistor with multiple emitter fingers | David L. Harame, Qizhi Liu, Ramana Malladi, John J. Pekarik | 2015-10-13 |
| 9111986 | Self-aligned emitter-base-collector bipolar junction transistors with a single crystal raised extrinsic base | Peng Cheng, Vibhor Jain, Qizhi Liu, John J. Pekarik | 2015-08-18 |
| 9070734 | Heterojunction bipolar transistors with reduced parasitic capacitance | Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2015-06-30 |
| 9059138 | Heterojunction bipolar transistor with reduced sub-collector length, method of manufacture and design structure | Zhong-Xiang He, Jeffrey B. Johnson, Qizhi Liu, Xuefeng Liu | 2015-06-16 |
| 9034712 | Stress enhanced LDMOS transistor to minimize on-resistance and maintain high breakdown voltage | Erik M. Dahlstrom, Robert J. Gauthier, Jr., Ephrem G. Gebreselasie, Richard A. Phelps, Jed H. Rankin +1 more | 2015-05-19 |
| 8975146 | Trench isolation structures and methods for bipolar junction transistors | Marwan H. Khater | 2015-03-10 |
| 8957456 | Heterojunction bipolar transistors with reduced parasitic capacitance | Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2015-02-17 |
| 8946799 | Silicon controlled rectifier with stress-enhanced adjustable trigger voltage | Erik M. Dahlstrom, Robert J. Gauthier, Jr., Ephrem G. Gebreselasie, Richard A. Phelps, Yun Shi +1 more | 2015-02-03 |
| 8946861 | Bipolar device having a monocrystalline semiconductor intrinsic base to extrinsic base link-up region | Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2015-02-03 |
| 8916446 | Bipolar junction transistor with multiple emitter fingers | David L. Harame, Qizhi Liu, Ramana Malladi, John J. Pekarik | 2014-12-23 |
| 8872305 | Integrated circuit structure having air-gap trench isolation and related design structure | James S. Dunn, David L. Harame, Anthony K. Stamper | 2014-10-28 |
| 8816401 | Heterojunction bipolar transistor | Jeffrey B. Johnson | 2014-08-26 |
| 8810005 | Bipolar device having a monocrystalline semiconductor intrinsic base to extrinsic base link-up region | Peng Cheng, Peter B. Gray, Vibhor Jain, Vikas K. Kaushal, Marwan H. Khater | 2014-08-19 |
| 8809998 | Semiconductor device including in wafer inductors, related method and design structure | John J. Ellis-Monaghan, Robert M. Rassel, Daniel S. Vanslette | 2014-08-19 |
| 8735986 | Forming structures on resistive substrates | Alan B. Botula, James S. Dunn, Jeffrey P. Gambino, Douglas B. Hershberger, Alvin J. Joseph +2 more | 2014-05-27 |
| 8716837 | Bipolar junction transistors with a link region connecting the intrinsic and extrinsic bases | Peter B. Gray, David L. Harame, Alvin J. Joseph, Marwan H. Khater, Qizhi Liu | 2014-05-06 |
| 8603889 | Integrated circuit structure having air-gap trench isolation and related design structure | James S. Dunn, David L. Harame, Anthony K. Stamper | 2013-12-10 |
| 8598660 | Stress enhanced LDMOS transistor to minimize on-resistance and maintain high breakdown voltage | Erik M. Dahlstrom, Robert J. Gauthier, Jr., Ephrem G. Gebreselasie, Richard A. Phelps, Jed H. Rankin +1 more | 2013-12-03 |