Issued Patents All Time
Showing 201–225 of 508 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6874063 | System bus read data transfers with data ordering control bits | Vicente Enrique Chung, Guy L. Guthrie, Jody B. Joyner | 2005-03-29 |
| 6865695 | Robust system bus recovery | Jody B. Joyner, Jerry Don Lewis, Vicente Enrique Chung | 2005-03-08 |
| 6848003 | Multi-node data processing system and communication protocol that route write data utilizing a destination ID obtained from a combined response | James Stephen Fields, Jr., Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2005-01-25 |
| 6842847 | Method, apparatus and system for acquiring a plurality of global promotion facilities through execution of an instruction | Derek E. Williams | 2005-01-11 |
| 6829762 | Method, apparatus and system for allocating and accessing memory-mapped facilities within a data processing system | Derek E. Williams | 2004-12-07 |
| 6829698 | Method, apparatus and system for acquiring a global promotion facility utilizing a data-less transaction | Derek E. Williams | 2004-12-07 |
| 6826655 | Apparatus for imprecisely tracking cache line inclusivity of a higher level cache | Guy L. Guthrie | 2004-11-30 |
| 6826654 | Cache invalidation bus for a highly scalable shared cache memory hierarchy | Guy L. Guthrie | 2004-11-30 |
| 6823471 | Method for providing high availability within a data processing system via a reconfigurable hashed storage subsystem | Leo James Clark, John S. Dodson, Guy L. Guthrie, Jerry Don Lewis | 2004-11-23 |
| 6813694 | Local invalidation buses for a highly scalable shared cache memory hierarchy | Guy L. Guthrie | 2004-11-02 |
| 6801984 | Imprecise snooping based invalidation mechanism | John Steven Dodson, Guy L. Guthrie, Jerry Don Lewis | 2004-10-05 |
| 6792521 | Behavioral memory mechanism for a data processing system | William J. Starke | 2004-09-14 |
| 6785774 | High performance symmetric multiprocessing systems via super-coherent data mechanisms | Guy L. Guthrie, William J. Starke, Derek E. Williams | 2004-08-31 |
| 6785776 | DMA exclusive cache state providing a fully pipelined input/output DMA write mechanism | George William Daly, Paul Umbarger | 2004-08-31 |
| 6782456 | Microprocessor system bus protocol providing a fully pipelined input/output DMA write mechanism | George William Daly, Paul Umbarger | 2004-08-24 |
| 6779086 | Symmetric multiprocessor systems with an independent super-coherent cache directory | Guy L. Guthrie, William J. Starke, Derek E. Williams | 2004-08-17 |
| 6763433 | High performance cache intervention mechanism for symmetric multiprocessor systems | John Steven Dodson, James Stephen Fields, Jr., Guy L. Guthrie | 2004-07-13 |
| 6763434 | Data processing system and method for resolving a conflict between requests to modify a shared cache line | John Steven Dodson, Guy L. Guthrie, Derek E. Williams | 2004-07-13 |
| 6763435 | Super-coherent multiprocessor system bus protocols | Guy L. Guthrie, William J. Starke, Derek E. Williams | 2004-07-13 |
| 6760817 | Method and system for prefetching utilizing memory initiated prefetch write operations | John Steven Dodson, James Stephen Fields, Jr. | 2004-07-06 |
| 6760809 | Non-uniform memory access (NUMA) data processing system having remote memory cache incorporated within system memory | John Steven Dodson, James Stephen Fields, Jr. | 2004-07-06 |
| 6754782 | Decentralized global coherency management in a multi-node computer system | John Steven Dodson, James Stephen Fields, Jr. | 2004-06-22 |
| 6748518 | Multi-level multiprocessor speculation mechanism | Guy L. Guthrie, John Steven Dodson, Derek E. Williams | 2004-06-08 |
| 6748501 | Microprocessor reservation mechanism for a hashed address system | Robert Alan Cargnoni, Guy L. Guthrie, Derek E. Williams | 2004-06-08 |
| 6728873 | System and method for providing multiprocessor speculation within a speculative branch path | Guy L. Guthrie, John Steven Dodson, Derek E. Williams | 2004-04-27 |