Issued Patents All Time
Showing 351–375 of 508 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6389529 | Method for alternate preferred time delivery of load data | Lakshminarayanan Baba Arimilli, John Steven Dodson, Jerry Don Lewis | 2002-05-14 |
| 6385702 | High performance multiprocessor system with exclusive-deallocate cache state | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-05-07 |
| 6385695 | Method and system for maintaining allocation information on data castout from an upper level cache | Lakshminarayana B. Arimilli, James Stephen Fields, Jr. | 2002-05-07 |
| 6385694 | High performance load instruction management via system bus with explicit register load and/or cache reload protocols | Leo James Clark, John Steven Dodson, Guy L. Guthrie | 2002-05-07 |
| 6374333 | Cache coherency protocol in which a load instruction hint bit is employed to indicate deallocation of a modified cache line supplied by intervention | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-04-16 |
| 6374330 | Cache-coherency protocol with upstream undefined state | John Steven Dodson, Jerry Don Lewis | 2002-04-16 |
| 6370618 | Method and system for allocating lower level cache entries for data castout from an upper level cache | Lakshminarayana B. Arimilli, James Stephen Fields, Jr. | 2002-04-09 |
| 6360299 | Extended cache state with prefetched stream ID information | Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. | 2002-03-19 |
| 6360297 | System bus read address operations with data ordering preference hint bits for vertical caches | Vicente Enrique Chung, Guy L. Guthrie, Jody B. Joyner | 2002-03-19 |
| 6356980 | Method and system for bypassing cache levels when casting out from an upper level cache | Lakshminarayana B. Arimilli, James Stephen Fields, Jr. | 2002-03-12 |
| 6356982 | Dynamic mechanism to upgrade o state memory-consistent cache lines | Lakshminarayana B. Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-03-12 |
| 6353875 | Upgrading of snooper cache state mechanism for system bus with read/castout (RCO) address transactions | John Steven Dodson, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2002-03-05 |
| 6349367 | Method and system for communication in which a castout operation is cancelled in response to snoop responses | John Steven Dodson, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2002-02-19 |
| 6349369 | Protocol for transferring modified-unsolicited state during data intervention | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-19 |
| 6349360 | System bus read address operations with data ordering preference hint bits | Vicente Enrique Chung, Guy L. Guthrie, Jody B. Joyner | 2002-02-19 |
| 6349368 | High performance mechanism to support O state horizontal cache-to-cache transfers | Lakshminarayana B. Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-02-19 |
| 6347363 | Merged vertical cache controller mechanism with combined cache controller and snoop queries for in-line caches | John Steven Dodson, Jerry Don Lewis | 2002-02-12 |
| 6347361 | Cache coherency protocols with posted operations | John Steven Dodson, Jerry Don Lewis | 2002-02-12 |
| 6345344 | Cache allocation mechanism for modified-unsolicited cache state that modifies victimization priority bits | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6345339 | Pseudo precise I-cache inclusivity for vertical caches | John Steven Dodson | 2002-02-05 |
| 6345340 | Cache coherency protocol with ambiguous state for posted operations | John Steven Dodson, Jerry Don Lewis | 2002-02-05 |
| 6345341 | Method of cache management for dynamically disabling O state memory-consistent data | Lakshminarayana B. Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-02-05 |
| 6345342 | Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6345343 | Multiprocessor system bus protocol with command and snoop responses for modified-unsolicited cache state | Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6343347 | Multiprocessor system bus with cache state and LRU snoop responses for read/castout (RCO) address transaction | John Steven Dodson, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis | 2002-01-29 |