RA

Ravi Kumar Arimilli

IBM: 507 patents #20 of 70,183Top 1%
Motorola: 3 patents #3,303 of 12,470Top 30%
🗺 Texas: #5 of 125,132 inventorsTop 1%
Overall (All Time): #373 of 4,157,543Top 1%
508
Patents All Time

Issued Patents All Time

Showing 276–300 of 508 patents

Patent #TitleCo-InventorsDate
6574714 Efficient instruction cache coherency maintenance mechanism for scalable multiprocessor computer system with write-back data cache John Steven Dodson, Guy L. Guthrie 2003-06-03
6574719 Method and apparatus for concurrently communicating with multiple embedded dynamic random access memory devices James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy, William J. Starke 2003-06-03
6571322 Multiprocessor computer system with sectored cache line mechanism for cache intervention John Steven Dodson, Guy L. Guthrie 2003-05-27
6553442 Bus master for SMP execution of global operations utilizing a single token with implied release John Steven Dodson, Jody B. Joyner, Jerry Don Lewis 2003-04-22
6553447 Data processing system with fully interconnected system architecture (FISA) Leo James Clark, Jerry Don Lewis, Bradley McCredie 2003-04-22
6553462 Multiprocessor computer system with sectored cache line mechanism for load and store operations John Steven Dodson, Guy L. Guthrie 2003-04-22
6553463 Method and system for high speed access to a banked cache memory Lakshminarayana B. Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy 2003-04-22
6549989 Extended cache coherency protocol with a “lock released” state Lakshminarayana B. Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke 2003-04-15
6546470 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers with banked directory implementation James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie, Jody B. Joyner 2003-04-08
6546469 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie, Jody B. Joyner 2003-04-08
6546468 Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers performing directory update James Stephen Fields, Jr., Sanjeev Ghai, Guy L. Guthrie, Jody B. Joyner 2003-04-08
6535957 System bus read data transfers with bus utilization based data ordering Vicente Enrique Chung, Guy L. Guthrie, Jody B. Joyner 2003-03-18
6535939 Dynamically configurable memory bus and scalability ports via hardware monitored bus utilizations Lakshminarayana B. Arimilli, Leo James Clark, James S. Fields, Jr. 2003-03-18
6532521 Mechanism for high performance transfer of speculative request data between levels of cache hierarchy Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. 2003-03-11
6532519 Apparatus for associating cache memories with processors within a multiprocessor data processing system James Stephen Fields, Jr., Sanjeev Ghai, Jody B. Joyner 2003-03-11
6519665 Multi-node data processing system and communication protocol in which a stomp signal is propagated to cancel a prior request James Stephen Fields, Jr., Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis 2003-02-11
6519649 Multi-node data processing system and communication protocol having a partial combined response James Stephen Fields, Jr., Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis 2003-02-11
6516404 Data processing system having hashed architected processor facilities Leo James Clark, John S. Dodson, Guy L. Guthrie, Jerry Don Lewis 2003-02-04
6516368 Bus master and bus snooper for execution of global operations utilizing a single token for multiple operations with explicit release John Steven Dodson, Jody B. Joyner, Jerry Don Lewis 2003-02-04
6510494 Time based mechanism for cached speculative data deallocation Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. 2003-01-21
6507880 Bus protocol, bus master and bus snooper for execution of global operations utilizing multiple tokens John Steven Dodson, Jody B. Joyner, Jerry Don Lewis 2003-01-14
6505277 Method for just-in-time delivery of load data by intervening caches Lakshminarayana B. Arimilli, John Steven Dodson, Jerry Don Lewis 2003-01-07
6502171 Multiprocessor system bus with combined snoop responses explicitly informing snoopers to scarf data John Steven Dodson, Guy L. Guthrie, Jody B. Joyner, Jerry Don Lewis 2002-12-31
6502168 Cache having virtual cache controller queues John Steven Dodson, Jerry Don Lewis 2002-12-31
6496921 Layered speculative request unit with instruction optimized and storage hierarchy optimized partitions Lakshminarayana B. Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. 2002-12-17