NC

Nathan P. Chelstrom

IBM: 14 patents #8,004 of 70,183Top 15%
KT Kabushiki Kaisha Toshiba: 1 patents #13,537 of 21,451Top 65%
SO Sony: 1 patents #17,262 of 25,231Top 70%
Overall (All Time): #325,148 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8144689 Controlling asynchronous clock domains to perform synchronous operations Mack W. Riley 2012-03-27
7908536 Testing functional boundary logic at asynchronous clock boundaries of an integrated circuit device Steven R. Ferguson, Mack W. Riley 2011-03-15
7797600 Method and apparatus for testing a ring of non-scan latches with logic built-in self-test Louis Bernard Bushard, Naoki Kiryu, David J. Krolak 2010-09-14
7792154 Controlling asynchronous clock domains to perform synchronous operations Mack W. Riley 2010-09-07
7702944 Dynamic frequency scaling sequence for multi-gigahertz microprocessors Mack W. Riley, Michael Fan Wang, Stephen Douglas Weitzel 2010-04-20
7688930 Using eFuses to store PLL configuration data Irene Beattie, Matthew E. Fernsler, Mack W. Riley 2010-03-30
7627771 Clock control hierarchy for integrated microprocessors and systems-on-a-chip Mack W. Riley, Shoji Sawamura 2009-12-01
7562272 Apparatus and method for using eFuses to store PLL configuration data Irene Beattie, Matthew E. Fernsler, Mack W. Riley 2009-07-14
7516350 Dynamic frequency scaling sequence for multi-gigahertz microprocessors Mack W. Riley, Michael Fan Wang, Stephen Douglas Weitzel 2009-04-07
7500164 Method for testing an integrated circuit device having elements with asynchronous clocks or dissimilar design methodologies Steven R. Ferguson, Mack W. Riley 2009-03-03
7492793 Method for controlling asynchronous clock domains to perform synchronous operations Mack W. Riley 2009-02-17
7484153 Systems and methods for LBIST testing using isolatable scan chains Naoki Kiryu, Mack W. Riley 2009-01-27
7478300 Method for testing functional boundary logic at asynchronous clock boundaries of an integrated circuit device Steven R. Ferguson, Mack W. Riley 2009-01-13
7406640 Method and apparatus for testing a ring of non-scan latches with logic built-in self-test Louis Bernard Bushard, Naoki Kiryu, David J. Krolak 2008-07-29
7233188 Methods and apparatus for reducing power consumption in a processor using clock signal control Chiaki Takano, Daniel Stasiak, Steven R. Ferguson 2007-06-19