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Multiple uses for BIST test latches |
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Testing functional boundary logic at asynchronous clock boundaries of an integrated circuit device |
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2011-03-15 |
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Multiple uses for BIST test latches |
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2009-08-11 |
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Method for testing an integrated circuit device having elements with asynchronous clocks or dissimilar design methodologies |
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Method for testing functional boundary logic at asynchronous clock boundaries of an integrated circuit device |
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