Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8244515 | Structure for detecting clock gating opportunities in a pipelined electronic circuit design | Hans M. Jacobson, Johny Srouji, Todd Swanson | 2012-08-14 |
| 8073669 | Method and apparatus for detecting clock gating opportunities in a pipelined electronic circuit design | Hans M. Jacobson, Johny Srouji, Todd Swanson | 2011-12-06 |
| 8027825 | Structure for testing an operation of integrated circuitry | Tilman Gloekler, Sanjay Gupta, Christopher J. Spandikow, Todd Swanson | 2011-09-27 |
| 8006155 | Testing an operation of integrated circuitry | Tilman Gloekler, Sanjay Gupta, Christopher J. Spandikow, Todd Swanson | 2011-08-23 |
| 7900086 | Accelerating test, debug and failure analysis of a multiprocessor device | Ramyanshu Datta, Harm Peter Hofstee | 2011-03-01 |
| 7688930 | Using eFuses to store PLL configuration data | Irene Beattie, Nathan P. Chelstrom, Mack W. Riley | 2010-03-30 |
| 7620126 | Method and apparatus for detecting frequency lock in a system including a frequency synthesizer | David William Boerstler, Eskinder Hailu, Jieming Qi, Mack W. Riley | 2009-11-17 |
| 7590194 | Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer | David William Boerstler, Eskinder Hailu, Jieming Qi, Mack W. Riley | 2009-09-15 |
| 7562272 | Apparatus and method for using eFuses to store PLL configuration data | Irene Beattie, Nathan P. Chelstrom, Mack W. Riley | 2009-07-14 |