Issued Patents All Time
Showing 26–50 of 238 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8867304 | Command throttling for multi-channel duty-cycle based memory power management | Karthick Rajamani, Eric E. Retter, Kenneth L. Wright | 2014-10-21 |
| 8862944 | Isolation of faulty links in a transmission medium | Frank D. Ferraiolo, Michele M. Franceschini, Kevin C. Gower, Ashish Jagmohan, Luis A. Lastras-Montano +1 more | 2014-10-14 |
| 8775906 | Efficient storage of meta-bits within a system memory | Benjiman L. Goodman, Steven J. Hnatko, Kenneth L. Wright | 2014-07-08 |
| 8775904 | Efficient storage of meta-bits within a system memory | Benjiman L. Goodman, Steven J. Hnatko, Kenneth L. Wright | 2014-07-08 |
| 8675444 | Synchronized command throttling for multi-channel duty-cycle based memory power management | Karthick Rajamani, Eric E. Retter, Kenneth L. Wright | 2014-03-18 |
| 8635401 | Method and apparatus for performing refresh operations in high-density memories | Benjiman L. Goodman, Hillery C. Hunter, Steven Powell, Jeffrey A. Stuecheli | 2014-01-21 |
| 8543759 | Method for scheduling memory refresh operations including power states | Mark A. Brittain, Benjamin Lee Goodman, Stephen J. Powell, Jeffrey A. Stuecheli | 2013-09-24 |
| 8539146 | Apparatus for scheduling memory refresh operations including power states | Mark A. Brittain, Benjiman L. Goodman, Stephen J. Powell, Jeffrey A. Stuecheli | 2013-09-17 |
| 8489807 | Techniques for performing refresh operations in high-density memories | Benjiman L. Goodman, Hillery C. Hunter, Stephen J. Powell, Jeffrey A. Stuecheli | 2013-07-16 |
| 7302616 | Method and apparatus for performing bus tracing with scalable bandwidth in a data processing system having a distributed memory | Jerry Don Lewis, Gary Alan Morrison | 2007-11-27 |
| 7284097 | Modified-invalid cache state to reduce cache-to-cache data transfer operations for speculatively-issued full cache line writes | James Stephen Fields, Jr., Guy L. Guthrie, Kenneth L. Wright | 2007-10-16 |
| 7213169 | Method and apparatus for performing imprecise bus tracing in a data processing system having a distributed memory | Michael Stephen Floyd, Jerry Don Lewis, Gary Alan Morrison | 2007-05-01 |
| 7058767 | Adaptive memory access speculation | James Stephen Fields, Jr., Sanjeev Ghai, Jeffrey A. Stuecheli | 2006-06-06 |
| 7017024 | Data processing system having no system memory | Ravi Kumar Arimilli, Sanjeev Ghai, Kenneth L. Wright | 2006-03-21 |
| 6970976 | Layered local cache with lower level cache optimizing allocation mechanism | Ravi Kumar Arimilli, Leo James Clark, Guy L. Guthrie | 2005-11-29 |
| 6963967 | System and method for enabling weak consistent storage advantage to a firmly consistent storage architecture | Guy L. Guthrie, Ravi Kumar Arimilli, Derek E. Williams | 2005-11-08 |
| 6920521 | Method and system of managing virtualized physical memory in a data processing system | Ravi Kumar Arimilli, Sanjeev Ghai, Kenneth L. Wright | 2005-07-19 |
| 6907494 | Method and system of managing virtualized physical memory in a memory controller and processor system | Ravi Kumar Arimilli, Sanjeev Ghai, Kenneth L. Wright | 2005-06-14 |
| 6904490 | Method and system of managing virtualized physical memory in a multi-processor system | Ravi Kumar Arimilli, Sanjeev Ghai, Kenneth L. Wright | 2005-06-07 |
| 6901485 | Memory directory management in a multi-node computer system | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2005-05-31 |
| 6886079 | Dynamic history based mechanism for the granting of exclusive data ownership in a non-uniform memory access (NUMA) computer system | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2005-04-26 |
| 6880073 | Speculative execution of instructions and processes before completion of preceding barrier operations | Ravi Kumar Arimilli, Guy L. Guthrie, Derek E. Williams | 2005-04-12 |
| 6801984 | Imprecise snooping based invalidation mechanism | Ravi Kumar Arimilli, Guy L. Guthrie, Jerry Don Lewis | 2004-10-05 |
| 6763433 | High performance cache intervention mechanism for symmetric multiprocessor systems | Ravi Kumar Arimilli, James Stephen Fields, Jr., Guy L. Guthrie | 2004-07-13 |
| 6763434 | Data processing system and method for resolving a conflict between requests to modify a shared cache line | Ravi Kumar Arimilli, Guy L. Guthrie, Derek E. Williams | 2004-07-13 |