Issued Patents All Time
Showing 51–75 of 100 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7613050 | Sense-amplifier assist (SAA) with power-reduction technique | George M. Braceras, Fred J. Towler | 2009-11-03 |
| 7609569 | System and method for implementing row redundancy with reduced access time and reduced device area | Michael T. Fragano | 2009-10-27 |
| 7573300 | Current control mechanism for dynamic logic keeper circuits in an integrated circuit and method of regulating same | Wagdi W. Abadeer, George M. Braceras, Albert M. Chu, John A. Fifield, Daryl M. Seitzer | 2009-08-11 |
| 7548080 | Method and apparatus for burn-in optimization | Wagdi W. Abadeer, Daryl M. Seitzer | 2009-06-16 |
| 7495950 | Voltage controlled static random access memory | John A. Fifield | 2009-02-24 |
| 7492199 | Fully synchronous DLL with architected update window | John E. Barwin | 2009-02-17 |
| 7489582 | Low overhead switched header power savings apparatus | John E. Barth, Jr., Vinod Ramadurai | 2009-02-10 |
| 7486586 | Voltage controlled static random access memory | John A. Fifield | 2009-02-03 |
| 7471114 | Design structure for a current control mechanism for power networks and dynamic logic keeper circuits | Wagdi W. Abadeer, George M. Braceras, Albert M. Chu, John A. Fifield, Daryl M. Seitzer | 2008-12-30 |
| 7466582 | Voltage controlled static random access memory | John A. Fifield | 2008-12-16 |
| 7403061 | Method of improving fuse state detection and yield in semiconductor applications | John E. Barwin, Steven H. Lamphier | 2008-07-22 |
| 7400546 | Low overhead switched header power savings apparatus | John E. Barth, Jr., Vinod Ramadurai | 2008-07-15 |
| 7352609 | Voltage controlled static random access memory | John A. Fifield | 2008-04-01 |
| 7307457 | Apparatus for implementing dynamic data path with interlocked keeper and restore devices | George M. Braceras, John A. Fifield | 2007-12-11 |
| 7262987 | SRAM cell using tunnel current loading devices | Wagdi W. Abadeer, John A. Fifield | 2007-08-28 |
| 7180320 | Adaptive integrated circuit based on transistor current measurements | George M. Braceras | 2007-02-20 |
| 7141998 | Method and apparatus for burn-in optimization | Wagdi W. Abadeer, Daryl M. Seitzer | 2006-11-28 |
| 7061793 | Apparatus and method for small signal sensing in an SRAM cell utilizing PFET access devices | John E. Barth, Jr., George M. Braceras | 2006-06-13 |
| 7049873 | System and method for implementing a micro-stepping delay chain for a delay locked loop | Reid A. Wistort | 2006-05-23 |
| 7016251 | Method and apparatus for initializing SRAM device during power-up | John A. Gabric | 2006-03-21 |
| 6998897 | System and method for implementing a micro-stepping delay chain for a delay locked loop | Reid A. Wistort | 2006-02-14 |
| 6999547 | Delay-lock-loop with improved accuracy and range | George M. Braceras | 2006-02-14 |
| 6989685 | Method and system for maintaining uniform module junction temperature during burn-in | Kevin C. Andersen, John A. Fifield | 2006-01-24 |
| 6967861 | Method and apparatus for improving cycle time in a quad data rate SRAM device | George M. Braceras | 2005-11-22 |
| 6944090 | Method and circuit for precise timing of signals in an embedded DRAM array | Darren L. Anand, John A. Fifield | 2005-09-13 |