Issued Patents All Time
Showing 26–50 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7880507 | Circular edge detector | Jerry Chang Jui Kao, Jente B. Kuang, Alan J. Drake, Fadi H. Gebara | 2011-02-01 |
| 7864625 | Optimizing SRAM performance over extended voltage or process range using self-timed calibration of local clock generator | Jente B. Kuang, Kevin John Nowka, Liang Pang | 2011-01-04 |
| 7810000 | Circuit timing monitor having a selectable-path ring oscillator | Hung C. Ngo, Alan J. Drake, Jente B. Kuang | 2010-10-05 |
| 7759980 | Circular edge detector for measuring timing of data signals | Jerry Chang Jui Kao, Jente B. Kuang, Alan J. Drake, Fadi H. Gebara | 2010-07-20 |
| 7725660 | Directory for multi-node coherent bus | Scott Douglas Clark, Bernard C. Drerup, Russell D. Hoover, Charles Ray Johns, David J. Krolak +2 more | 2010-05-25 |
| 7668037 | Storage array including a local clock buffer with programmable timing | Fadi H. Gebara, Jerry Chang Jui Kao, Jente B. Kuang, Kevin John Nowka, Liang Pang | 2010-02-23 |
| 7669013 | Directory for multi-node coherent bus | Scott Douglas Clark, Bernard C. Drerup, Russell D. Hoover, Charles Ray Johns, David J. Krolak +2 more | 2010-02-23 |
| 7667513 | Digital duty cycle corrector | Alan J. Drake, Fadi H. Gebara, Chandler McDowell, Hung C. Ngo | 2010-02-23 |
| 7620510 | Pulsed ring oscillator circuit for storage cell read timing evaluation | Jente B. Kuang, Kevin John Nowka, Liang Pang | 2009-11-17 |
| 7576569 | Circuit for dynamic circuit timing synthesis and monitoring of critical paths and environmental conditions of an integrated circuit | Alan J. Drake, Harmander Singh Deogun, Michael Stephen Floyd, Norman K. James, Robert M. Senger | 2009-08-18 |
| 7443195 | Method of transparently reducing power consumption of a high-speed communication link | Juan-Antonio Carballo, Jeffrey L. Burns, Kevin John Nowka, Ivan Vo, Seung-Moon Yoo | 2008-10-28 |
| 7409305 | Pulsed ring oscillator circuit for storage cell read timing evaluation | Jente B. Kuang, Kevin John Nowka, Liang Pang | 2008-08-05 |
| 7288975 | Method and apparatus for fail-safe and restartable system clock generation | Hung C. Ngo, Fadi H. Gebara, Jente B. Kuang | 2007-10-30 |
| 7260755 | Skewed inverter delay line for use in measuring critical paths in an integrated circuit | Ramyanshu Datta | 2007-08-21 |
| 7113048 | Ultra high frequency ring oscillator with voltage controlled frequency capabilities | Richard B. Brown, Fadi H. Gebara | 2006-09-26 |
| 7080011 | Speech label accelerators and techniques for using same | Yoanna Baumgartner, Brian E. D. Kingsbury, Harry Printz, Richard Siegmund, Jr. | 2006-07-18 |
| 6963250 | Voltage controlled oscillator with selectable frequency ranges | Hung C. Ngo | 2005-11-08 |
| 6963629 | Adaptive phase locked loop | David William Boerstler, Hung C. Ngo | 2005-11-08 |
| 6948017 | Method and apparatus having dynamically scalable clock domains for selectively interconnecting subsystems on a synchronous bus | Vikas Chandra | 2005-09-20 |
| 6931561 | Apparatus and method for asynchronously interfacing high-speed clock domain and low-speed clock domain using a plurality of storage and multiplexer components | Tung Nguyen Pham | 2005-08-16 |
| 6886106 | System and method for controlling a multiplexer for selecting between an input clock and an input duty-cycle-corrected clock and outputting the selected clock and an enable signal | Bishop Brock, Amanda Caswell, Eric MacDonald, Timothy Rubidoux | 2005-04-26 |
| 6812739 | Method of transparently reducing power consumption of a high-speed communication link | Juan-Antonio Carballo, Jeffrey L. Burns, Kevin John Nowka, Ivan Vo, Seung-Moon Yoo | 2004-11-02 |
| 6809602 | Multi-mode VCO | David William Boerstler, Hung C. Ngo, Kevin John Nowka | 2004-10-26 |
| 6753698 | Low power low voltage transistor—transistor logic I/O driver | Francis Chan, Kevin John Nowka, Hongfei Wu | 2004-06-22 |
| 6717452 | Level shifter | Kevin John Nowka | 2004-04-06 |