Issued Patents All Time
Showing 351–358 of 358 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7082550 | Method and apparatus for mirroring units within a processor | Michael Billeci, Timothy J. Slegel | 2006-07-25 |
| 7039762 | Parallel cache interleave accesses with address-sliced directories | Jennifer A. Navarro, Aaron Tsai | 2006-05-02 |
| 7035986 | System and method for simultaneous access of the same line in cache storage | Mark A. Check, Jennifer A. Navarro, Timothy J. Slegel, Aaron Tsai | 2006-04-25 |
| 6865645 | Program store compare handling between instruction and operand caches | Dean G. Bair, Charles F. Webb, Mark A. Check, John S. Liptay | 2005-03-08 |
| 6745313 | Absolute address bits kept in branch history table | John S. Liptay, Mark A. Check, Brian R. Prasky | 2004-06-01 |
| 6560687 | Method of implementing a translation lookaside buffer with support for a real space control | Aaron Tsai, Dean G. Bair, Rebecca S. Wisniewski, Charles F. Webb | 2003-05-06 |
| 6233655 | Method for Quad-word Storing into 2-way interleaved L1 cache | Wen H. Li, Charles F. Webb | 2001-05-15 |
| 6219758 | False exception for cancelled delayed requests | Jennifer A. Navarro, Barry W. Krumm, Pak-kin Mak, Michael Fee | 2001-04-17 |