AR

Alexander Reznicek

IBM: 1182 patents #3 of 70,183Top 1%
Globalfoundries: 77 patents #21 of 4,424Top 1%
ET Elpis Technologies: 9 patents #2 of 121Top 2%
GU Globalfoundries U.S.: 4 patents #206 of 665Top 35%
Samsung: 3 patents #30,683 of 75,807Top 45%
TE Tessera: 3 patents #129 of 271Top 50%
SS Stmicroelectronics Sa: 2 patents #601 of 1,676Top 40%
MT Matheson Tri-Gas: 1 patents #28 of 47Top 60%
IB International Business: 1 patents #4 of 119Top 4%
IM International Machines: 1 patents #1 of 34Top 3%
AS Adeia Semiconductor Solutions: 1 patents #22 of 57Top 40%
RE Renesas Electronics: 1 patents #2,739 of 4,529Top 65%
📍 Troy, NY: #1 of 610 inventorsTop 1%
🗺 New York: #2 of 115,490 inventorsTop 1%
Overall (All Time): #40 of 4,157,543Top 1%
1279
Patents All Time

Issued Patents All Time

Showing 1,251–1,275 of 1,279 patents

Patent #TitleCo-InventorsDate
8039371 Reduced defect semiconductor-on-insulator hetero-structures Stephen W. Bedell, Jeehwan Kim, Devendra K. Sadana 2011-10-18
7968459 Ion implantation combined with in situ or ex situ heat treatment for improved field effect transistors Stephen W. Bedell, Joel P. Desouza, Zhibin Ren, Devandra K. Sadana, Katherine L. Saenger +1 more 2011-06-28
7943486 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Rajesh Rengarajan +3 more 2011-05-17
7897444 Strained semiconductor-on-insulator (sSOI) by a simox method Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Devendra K. Sadana +1 more 2011-03-01
7897480 Preparation of high quality strained-semiconductor directly-on-insulator substrates Jack O. Chu, Philip A. Saunders, Leathen Shi 2011-03-01
7833884 Strained semiconductor-on-insulator by Si:C combined with porous process Stephen W. Bedell, Joel P. de Souza, Devendra K. Sadana 2010-11-16
7785939 Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers Joel P. de Souza, John A. Ott, Katherine L. Saenger 2010-08-31
7772096 Formation of SOI by oxidation of silicon with engineered porosity gradient Joel P. Desouza, Keith E. Fogel, Devendra K. Sadana 2010-08-10
7691688 Strained silicon CMOS on hybrid crystal orientations Kevin K. Chan, Meikei Ieong, Devendra K. Sadana, Leathen Shi, Min Yang 2010-04-06
7655551 Control of poly-Si depletion in CMOS via gas phase doping Yaocheng Liu, Devendra K. Sadana 2010-02-02
7592671 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Devendra K. Sadana +1 more 2009-09-22
7560361 Method of forming gate stack for semiconductor electronic device Martin M. Frank, Evgeni Gousev, Eduard A. Cartier 2009-07-14
7498235 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates Tze-Chiang Chen, Guy M. Cohen, Devendra K. Sadana, Ghavam G. Shahidi 2009-03-03
7485539 Strained semiconductor-on-insulator (sSOI) by a simox method Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Devendra K. Sadana +1 more 2009-02-03
7473626 Control of poly-Si depletion in CMOS via gas phase doping Yaocheng Liu, Devendra K. Sadana 2009-01-06
7462525 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Rajesh Rengarajan +3 more 2008-12-09
7449767 Mixed orientation and mixed material semiconductor-on-insulator wafer Guy M. Cohen, Katherine L. Saenger, Min Yang 2008-11-11
7402466 Strained silicon CMOS on hybrid crystal orientations Kevin K. Chan, Meikei Ieong, Devendra K. Sadana, Leathen Shi, Min Yang 2008-07-22
7364958 CMOS on hybrid substrate with different crystal orientations using silicon-to-silicon direct wafer bonding Meikei Ieong, Min Yang 2008-04-29
7314790 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Ieong, Rajesh Rengarajan +3 more 2008-01-01
7315065 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates Tze-Chiang Chen, Guy M. Cohen, Devendra K. Sadana, Ghavam G. Shahidi 2008-01-01
7253034 Dual SIMOX hybrid orientation technology (HOT) substrates Kevin K. Chan, Joel P. de Souza, Devendra K. Sadana, Katherine L. Saenger 2007-08-07
7172930 Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer Thomas N. Adam, Stephen W. Bedell, Joel P. de Souza, Keith E. Fogel, Devendra K. Sadana +1 more 2007-02-06
7161169 Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain Victor Chan, Massimo V. Fischetti, John Michael Hergenrother, Meikei Leong, Rajesh Rengarajan +3 more 2007-01-09
7125785 Mixed orientation and mixed material semiconductor-on-insulator wafer Guy M. Cohen, Katherine L. Saenger, Min Yang 2006-10-24