Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7408212 | Stackable resistive cross-point memory with schottky diode isolation | Harry Luan, Arthur Wang, Kai-Cheng Chou, Kenlin Huang | 2008-08-05 |
| 7186658 | Method and resulting structure for PCMO film to obtain etching rate and mask to selectively by inductively coupled plasma | Kenlin Huang, Kaicheng Chou, Harry Luan, Arthur Wang | 2007-03-06 |
| 6693830 | Single-poly two-transistor EEPROM cell with differentially doped floating gate | YongZhong Hu | 2004-02-17 |
| 6627947 | Compact single-poly two transistor EEPROM cell | YongZhong Hu, Stewart Logie | 2003-09-30 |
| 6525970 | Erase method for flash memory | Arthur Wang, Ming Sang Kwan | 2003-02-25 |
| 6366499 | Method of operating flash memory | Arthur Wang, Ming Sang Kwan | 2002-04-02 |
| 6347054 | Method of operating flash memory | Arthur Wang, Ming Sang Kwan | 2002-02-12 |
| 6330190 | Semiconductor structure for flash memory enabling low operating potentials | Arthur Wang, Ming Sang Kwan | 2001-12-11 |
| 6043123 | Triple well flash memory fabrication process | Hsingya Arthur Wang, Ming Sang Kwan | 2000-03-28 |
| 5920506 | Method and apparatus for bulk preprogramming flash memory cells with minimal source and drain currents | Hsingya Arthur Wang, Haike Dong, Yuan Tang, Aaron Yip, Kenneth Miu | 1999-07-06 |
| 5899726 | Method of forming oxide isolation in a semiconductor device | Hsingya Arthur Wang, Mark T. Ramsbey | 1999-05-04 |
| 5866467 | Method of improving oxide isolation in a semiconductor device | Hsingya Arthur Wang, Nicholas H. Tripsas | 1999-02-02 |
| 5818082 | E.sup.2 PROM device having erase gate in oxide isolation region in shallow trench and method of manufacture thereof | Hsingya Arthur Wang, Darlene Hamilton | 1998-10-06 |
| 5278438 | Electrically erasable and programmable read-only memory with source and drain regions along sidewalls of a trench structure | Manjin J. Kim | 1994-01-11 |