Issued Patents All Time
Showing 151–175 of 302 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7617437 | Error correction device and method thereof | — | 2009-11-10 |
| 7610466 | Data processing system using independent memory and register operand size specifiers and method thereof | — | 2009-10-27 |
| 7584344 | Instruction for conditionally yielding to a ready thread based on priority criteria | Gary L. Whisenhunt | 2009-09-01 |
| 7581151 | Method and apparatus for affecting a portion of an integrated circuit | William C. Bruce, Jr. | 2009-08-25 |
| 7574564 | Replacement pointer control for set associative cache and method | — | 2009-08-11 |
| 7565514 | Parallel condition code generation for SIMD operations | — | 2009-07-21 |
| 7555605 | Data processing system having cache memory debugging support and method therefor | — | 2009-06-30 |
| 7539906 | System for integrated data integrity verification and method thereof | — | 2009-05-26 |
| 7500152 | Apparatus and method for time ordering events in a system having multiple time domains | Richard G. Collins, Michael D. Fitzsimmons, Jason T. Nearing | 2009-03-03 |
| 7453756 | Method for powering an electronic device and circuit | Ravindraraj Ramaraju | 2008-11-18 |
| 7447886 | System for expanded instruction encoding and method thereof | Lea Hwang Lee | 2008-11-04 |
| 7447867 | Non-intrusive address mapping having a modified address space identifier and circuitry therefor | Richard Soja, Ray Marshall | 2008-11-04 |
| 7444668 | Method and apparatus for determining access permission | Afzal M. Malik | 2008-10-28 |
| 7444568 | Method and apparatus for testing a data processing system | Gary R. Morrison, Jose A. Lyon, Anthony M. Reipold | 2008-10-28 |
| 7434264 | Data processing system with peripheral access protection and method therefor | Joseph C. Circello, Craig D. Shaw | 2008-10-07 |
| 7434108 | Masking within a data processing system having applicability for a development interface | Richard G. Collins | 2008-10-07 |
| 7430642 | System and method for unified cache access using sequential instruction information | — | 2008-09-30 |
| 7415558 | Communication steering for use in a multi-master shared resource system | Arnaldo R. Cruz, John J. Vaglica, Tuongvu Van Nguyen | 2008-08-19 |
| 7409502 | Selective cache line allocation instruction execution and circuitry | Jeffrey W. Scott | 2008-08-05 |
| 7404019 | Method and apparatus for endianness control in a data processing system | Michael D. Fitzsimmons | 2008-07-22 |
| 7401201 | Processor and method for altering address translation | Ray Marshall, Richard Soja | 2008-07-15 |
| 7400545 | Storage circuit with efficient sleep mode and method | Ravindraraj Ramaraju | 2008-07-15 |
| 7376807 | Data processing system having address translation bypass and method therefor | — | 2008-05-20 |
| 7362645 | Integrated circuit fuses having corresponding storage circuitry | Qadeer A. Qureshi, John J. Vaglica, Ryan D. Bedwell | 2008-04-22 |
| 7353311 | Method of accessing information and system therefor | Brett Murdock, Michael D. Fitzsimmons | 2008-04-01 |