Issued Patents All Time
Showing 1–25 of 145 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12088865 | Methods and apparatus for affiliate interrupt detection | Jeremey M. Davis, David Howell Wright, Alexander Topchy, Cherisse Ponraj, Chris Curtis +3 more | 2024-09-10 |
| 11677996 | Methods and apparatus for affiliate interrupt detection | Jeremey M. Davis, David Howell Wright, Alexander Topchy, Cherisse Ponraj, Chris Curtis +3 more | 2023-06-13 |
| 11082730 | Methods and apparatus for affiliate interrupt detection | Jeremey M. Davis, David Howell Wright, Alexander Topchy, Cherisse Ponraj, Chris Curtis +3 more | 2021-08-03 |
| 10732976 | Integrated circuit processor and method of operating the integrated circuit processor in different modes of differing thread counts | Alistair Robertson | 2020-08-04 |
| 10467014 | Configurable pipeline based on error detection mode in a data processing system | William C. Moyer | 2019-11-05 |
| 10445237 | Data processing system having a cache with a store buffer | — | 2019-10-15 |
| 10445133 | Data processing system having dynamic thread control | Jonathan J. Gamoneda, Jehoda Refaeli | 2019-10-15 |
| 10324723 | Systems and methods for processing both instructions and constant values from a memory of a digital processor accessed by separate pointers | Peter J. Wilson, Brian C. Kahne | 2019-06-18 |
| 10108467 | Data processing system with speculative fetching | William C. Moyer, Quyen Pho | 2018-10-23 |
| 10019266 | Selectively performing a single cycle write operation with ECC in a data processing system | William C. Moyer | 2018-07-10 |
| 10007522 | System and method for selectively allocating entries at a branch target buffer | William C. Moyer | 2018-06-26 |
| 9483272 | Systems and methods for managing return stacks in a multi-threaded data processing system | William C. Moyer, Alistair Robertson | 2016-11-01 |
| 9448942 | Random access of a cache portion using an access module | William C. Moyer | 2016-09-20 |
| 9311099 | Systems and methods for locking branch target buffer entries | William C. Moyer | 2016-04-12 |
| 9304773 | Data processor having dynamic control of instruction prefetch buffer depth and method therefor | William C. Moyer | 2016-04-05 |
| 9223678 | Data processor device having a debug control module which selectively modifies trace messages | William C. Moyer | 2015-12-29 |
| 9135010 | Processor executing instructions in ALU in first/second pipeline stage during non-ECC/ECC mode | William C. Moyer | 2015-09-15 |
| 9092622 | Random timeslot controller for enabling built-in self test module | William C. Moyer | 2015-07-28 |
| 9069896 | Data processor device for handling a watchpoint and method thereof | William C. Moyer | 2015-06-30 |
| 9047400 | Data processor device for handling a watchpoint and method thereof | William C. Moyer | 2015-06-02 |
| 8948708 | Partitioned radio-frequency apparatus and associated methods | Donald A. Kerth, Richard T. Behrens, G. Diwakar Vishakhadatta, G. Tyson Tuttle, Vishnu Srinivasan | 2015-02-03 |
| 8843080 | Partitioned radio-frequency apparatus and associated methods | Donald A. Kerth, Richard T. Behrens, G. Diwakar Vishakhadatta, G. Tyson Tuttle, Vishnu Srinivasan | 2014-09-23 |
| 8769355 | Using built-in self test for preventing side channel security attacks on multi-processor systems | William C. Moyer | 2014-07-01 |
| 8467483 | Radio-frequency apparatus and associated methods | G. Diwakar Vishakhadatta, Donald A. Kerth, Richard T. Behrens, G. Tyson Tuttle, Vishnu Srinivasan | 2013-06-18 |
| 8422964 | Partitioned radio-frequency apparatus and associated methods | Donald A. Kerth, Richard T. Behrens, G. Diwakar Vishakhadatta, G. Tyson Tuttle, Vishnu Srinivasan | 2013-04-16 |