Issued Patents All Time
Showing 176–200 of 302 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7340542 | Data processing system with bus access retraction | Brett Murdock | 2008-03-04 |
| 7334059 | Multiple burst protocol device controller | — | 2008-02-19 |
| 7315932 | Data processing system having instruction specifiers for SIMD register operands and method thereof | — | 2008-01-01 |
| 7299335 | Translation information retrieval transparent to processor core | — | 2007-11-20 |
| 7296137 | Memory management circuitry translation information retrieval during debugging | — | 2007-11-13 |
| 7287194 | Real-time debug support for a DMA device and method thereof | — | 2007-10-23 |
| 7277972 | Data processing system with peripheral access protection and method therefor | Michael D. Fitzsimmons | 2007-10-02 |
| 7278062 | Method and apparatus for responding to access errors in a data processing system | Michael D. Fitzsimmons, Brian Millar, John J. Vaglica | 2007-10-02 |
| 7275148 | Data processing system using multiple addressing modes for SIMD operations and method thereof | James M. Norris, Philip E. May, Kent D. Moat, Raymond B. Essick, IV, Brian G. Lucas | 2007-09-25 |
| 7266848 | Integrated circuit security and method therefor | Michael D. Fitzsimmons | 2007-09-04 |
| 7248069 | Method and apparatus for providing security for debug circuitry | Thomas E. Tkacik | 2007-07-24 |
| 7249223 | Prefetching in a data processing system | Craig D. Shaw | 2007-07-24 |
| 7237149 | Method and apparatus for qualifying debug operation using source information | John J. Vaglica | 2007-06-26 |
| 7228401 | Interfacing a processor to a coprocessor in which the processor selectively broadcasts to or selectively alters an execution mode of the coprocessor | — | 2007-06-05 |
| 7200719 | Prefetch control in a data processing system | Lea Hwang Lee, Afzal M. Malik | 2007-04-03 |
| 7188262 | Bus arbitration in low power system | John Arends, Steven L. Schwartz | 2007-03-06 |
| 7185121 | Method of accessing memory via multiple slave ports | Michael D. Fitzsimmons, Brett Murdock | 2007-02-27 |
| 7185251 | Method and apparatus for affecting a portion of an integrated circuit | William C. Bruce, Jr. | 2007-02-27 |
| 7185148 | Read access and storage circuitry read allocation applicable to a cache | — | 2007-02-27 |
| 7155618 | Low power system and method for a data processing system | Brian Millar, Michael D. Fitzsimmons | 2006-12-26 |
| 7139878 | Method and apparatus for dynamic prefetch buffer configuration and replacement | Afzal M. Malik | 2006-11-21 |
| 7130943 | Data processing system with bus access retraction | Jimmy Gumulja, Brett Murdock | 2006-10-31 |
| 7124281 | Processing system having sequential address indicator signals | Jeffrey W. Scott, Brett Murdock | 2006-10-17 |
| 7117346 | Data processing system having multiple register contexts and method therefor | John Arends | 2006-10-03 |
| 7107436 | Conditional next portion transferring of data stream to or from register based on subsequent instruction aspect | — | 2006-09-12 |