Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10248750 | Power savings method in a clock mesh-based design through a smart decloning technique | Suhail Ahmed, Rajesh Kashyap | 2019-04-02 |
| 10089428 | Intelligent cell swapping based on ceiling determination, floor determination, and cell attribute weighting criteria | Ahsan Chowdhury, Robert A. Colyer, John Michael Fedor, Yohan KWON | 2018-10-02 |
| 9779201 | Low power minimal disruptive method to implement large quantity push and pull useful-skew schedules with enabling circuits in a clock-mesh based design | Ahsan Chowdhury, Suhail Ahmed, Matthew Berzins, Jinkyu Lee | 2017-10-03 |
| 9647453 | Dual supply memory | Prashant U. Kenkare, Frank Philip Helms | 2017-05-09 |
| 9571074 | Efficient skew scheduling methodology for performance and low power of a clock-mesh implementation | Ahsan Chowdhury, John Michael Fedor, Michael Lewis | 2017-02-14 |
| 7737740 | Integrated circuit with a programmable delay and a method thereof | Andrew Paul Hoover | 2010-06-15 |
| 7278062 | Method and apparatus for responding to access errors in a data processing system | William C. Moyer, Michael D. Fitzsimmons, John J. Vaglica | 2007-10-02 |
| 7155618 | Low power system and method for a data processing system | William C. Moyer, Michael D. Fitzsimmons | 2006-12-26 |
| 7123068 | Flip-flop circuit having low power data retention | Andrew Paul Hoover, Milind P. Padhye | 2006-10-17 |
| 6490225 | Memory having a synchronous controller and asynchronous array and method thereof | Tom ANDRE | 2002-12-03 |
| 5457802 | Integrated circuit pin control apparatus and method thereof in a data processing system | Michael Catherwood, Linda R. Nuckolls | 1995-10-10 |