Issued Patents All Time
Showing 26–50 of 117 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9318409 | Integrated circuit heater for reducing stress in the integrated circuit material and chip leads of the integrated circuit, and for optimizing performance of devices of the integrated circuit | Douglas M. Reber, Edward O. Travis | 2016-04-19 |
| 9263441 | Implant for performance enhancement of selected transistors in an integrated circuit | William F. Johnstone, Chad Weintraub | 2016-02-16 |
| 9252152 | Method for forming a split-gate device | Mark D. Hall | 2016-02-02 |
| 9245817 | Semiconductor device with embedded heat spreading | Edward O. Travis, Douglas M. Reber | 2016-01-26 |
| 9245086 | Techniques for electromigration stress mitigation in interconnects of an integrated circuit design | Ertugrul Demircan | 2016-01-26 |
| 9236344 | Thin beam deposited fuse | Douglas M. Reber, Edward O. Travis | 2016-01-12 |
| 9231077 | Method of making a logic transistor and non-volatile memory (NVM) cell | Mark D. Hall | 2016-01-05 |
| 9202930 | Memory with discrete storage elements | Konstantin V. Loiko, Brian A. Winstead | 2015-12-01 |
| 9142507 | Stress migration mitigation utilizing induced stress effects in metal trace of integrated circuit device | Douglas M. Reber, Edward O. Travis | 2015-09-22 |
| 9122829 | Stress migration mitigation | Douglas M. Reber, Edward O. Travis | 2015-09-01 |
| 9122812 | Semiconductor device with vias on a bridge connecting two buses | Douglas M. Reber, Edward O. Travis | 2015-09-01 |
| 9112056 | Method for forming a split-gate device | Mark D. Hall | 2015-08-18 |
| 9111865 | Method of making a logic transistor and a non-volatile memory (NVM) cell | Mark D. Hall, Frank K. Baker, Jr. | 2015-08-18 |
| 9087913 | Integration technique using thermal oxide select gate dielectric for select gate and apartial replacement gate for logic | Mark D. Hall, Frank K. Baker, Jr. | 2015-07-21 |
| 9087862 | Methods of making semiconductor devices with non-volatile memory cells | Mark D. Hall | 2015-07-21 |
| 9082824 | Method for forming an electrical connection between metal layers | Douglas M. Reber, Edward O. Travis | 2015-07-14 |
| 9032615 | Method for forming an electrical connection between metal layers | Edward O. Travis, Douglas M. Reber | 2015-05-19 |
| 9000507 | Method and system for recovering from transistor aging using heating | Bradley P. Smith | 2015-04-07 |
| 8972922 | Method for forming an electrical connection between metal layers | Douglas M. Reber, Edward O. Travis | 2015-03-03 |
| 8951892 | Applications for nanopillar structures | Mark D. Hall | 2015-02-10 |
| 8951863 | Non-volatile memory (NVM) and logic integration | Mark D. Hall, Frank K. Baker, Jr. | 2015-02-10 |
| 8946000 | Method for forming an integrated circuit having a programmable fuse | Douglas M. Reber, Edward O. Travis | 2015-02-03 |
| 8941242 | Method of protecting against via failure and structure therefor | Douglas M. Reber, Edward O. Travis | 2015-01-27 |
| 8933711 | Capacitive sensor radiation measurement | Mark D. Hall | 2015-01-13 |
| 8906764 | Non-volatile memory (NVM) and logic integration | Mark D. Hall | 2014-12-09 |