Issued Patents All Time
Showing 76–100 of 109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8024715 | Method and apparatus for detecting transient faults via dynamic binary translation | George Reis, Robert Cohn | 2011-09-20 |
| 7954038 | Fault detection | Paul Racunas, Srilatha Manne, Kypros Constantinides | 2011-05-31 |
| 7849387 | Detecting architectural vulnerability of processor resources | Arijit Biswas, Niranjan Soundararajan | 2010-12-07 |
| 7747897 | Method and apparatus for lockstep processing on a fixed-latency interconnect | Paul Racunas, Matthew Mattina, George Z. Chrysos | 2010-06-29 |
| 7747932 | Reducing the uncorrectable error rate in a lockstepped dual-modular redundancy system | Paul Racunas, Joel S. Emer, Arijit Biswas, Steven Raasch | 2010-06-29 |
| 7649845 | Handling hot spots in interconnection networks | — | 2010-01-19 |
| 7606980 | Demand-based error correction | Moinuddin K. Qureshi, Paul Racunas | 2009-10-20 |
| 7607048 | Method and apparatus for protecting TLB's VPN from soft errors | Ugonna Echeruo, George Z. Chrysos, John H. Crawford | 2009-10-20 |
| 7587663 | Fault detection using redundant virtual machines | Steven K. Reinhardt | 2009-09-08 |
| 7581152 | Fault free store data path for software implementation of redundant multithreading environments | Robert Cohn | 2009-08-25 |
| 7574568 | Optionally pushing I/O data into a processor's cache | — | 2009-08-11 |
| 7555703 | Method and apparatus for reducing false error detection in a microprocessor | Joel S. Emer, Steven K. Reinhardt, Christopher T. Weaver, Michael J. Smith | 2009-06-30 |
| 7543221 | Method and apparatus for reducing false error detection in a redundant multi-threaded system | Joel S. Emer, Steven K. Reinhardt, Christopher T. Weaver, Michael J. Smith | 2009-06-02 |
| 7529118 | Generalized interlocked register cell (GICE) | Wayne Burleson, Vinod Ambrose, Daniel E. Holcomb | 2009-05-05 |
| 7475321 | Detecting errors in directory entries | Sudhanva Gurumurthi, Arijit Biswas, Joel S. Emer | 2009-01-06 |
| 7472299 | Low power arbiters in interconnection routers | — | 2008-12-30 |
| 7444497 | Managing external memory updates for fault detection in redundant multithreading systems using speculative memory support | Steven K. Reinhardt, Joel S. Emer, Christopher T. Weaver | 2008-10-28 |
| 7386756 | Reducing false error detection in a microprocessor by tracking instructions neutral to errors | Joel S. Emer, Steven K. Reinhardt, Christopher T. Weaver | 2008-06-10 |
| 7380169 | Converting merge buffer system-kill errors to process-kill errors | Tryggve Fossum, Yaron Shragai, Ugonna Echeruo | 2008-05-27 |
| 7373558 | Vectoring process-kill errors to an application program | — | 2008-05-13 |
| 7373548 | Hardware recovery in a multi-threaded architecture | Steven K. Reinhardt, Joel S. Emer | 2008-05-13 |
| 7370231 | Method of handling errors | Tryggve Fossum, Yaron Shragai | 2008-05-06 |
| 7353365 | Implementing check instructions in each thread within a redundant multithreading environments | Joel S. Emer, Steven K. Reinhardt, Christopher T. Weaver | 2008-04-01 |
| 7308607 | Periodic checkpointing in a redundantly multi-threaded architecture | Steven K. Reinhardt, Joel S. Emer | 2007-12-11 |
| 7260674 | Programmable parallel lookup memory | — | 2007-08-21 |