Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
FC

Feng Chen — 25 Patents

CMChartered Semiconductor Manufacturing: 19 patents #34 of 840Top 5%
SLShenzhen Smoore Technology Limited: 2 patents #49 of 136Top 40%
ATAT&T: 2 patents #7,295 of 18,772Top 40%
ZCZhejiang University City College: 1 patents #31 of 77Top 45%
SUShaoxing University: 1 patents #11 of 28Top 40%
NTNanya Technology: 1 patents #447 of 775Top 60%
Lo Wu, CN: #297 of 7,906 inventorsTop 4%
Overall (All Time): #158,593 of 4,157,543Top 4%
25 Patents All Time
Feng Chen has been granted 25 US patents while listed as an inventor at Chartered Semiconductor Manufacturing. The first was granted in 2000 and the most recent in July 2025. Feng Chen ranks #158,593 of 4,157,543 US inventors in our database (top 3.8%). Patent records list Feng Chen in Lo Wu, CN.

Issued Patents All Time

Showing 1–25 of 25 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12369635 Vaporizer and ceramic vaporization core thereof and method for fabricating ceramic vaporization core Hongming ZHOU, Bo Li, Shaobin XIANG, Jicai LONG 2025-07-29
12313183 Controller for electromagnetic valve, water treatment device and gas cooker Shanyu Zhang, Guanghua Li 2025-05-27
12122724 Composite ceramic member and method for preparation thereof, vaporization assembly, and electronic cigarette Bo Li 2024-10-22
12077459 Device and method for mud solidification based on electro-osmosis well points cooperating with well-points dewatering Yunjin Hu, Jiqing Jiang, Lianying Zhou, Lu Shi 2024-09-03
9956656 Electronic cigarette atomizer oiling and labeling device Haisheng Zou, Zhicheng Li, Xuebin Yu, Weizhao Tang, Lin Yang +2 more 2018-05-01
8536635 Semiconductor structure and fabrication method thereof Chien-An Yu, Yuan-Sung Chang, Chun-Hung Chien 2013-09-17
7741719 Integrated circuit system with dummy region Dong Liu, Cing Ge Lim, Subbiah Chettiar Mahadevan 2010-06-22
7446039 Integrated circuit system with dummy region Dong Liu, Cing Gie Lim, Subbiah Chettiar Mahadevan 2008-11-04 $19,000
7156726 Polishing apparatus and method for forming an integrated circuit Lup San Leong, Charles Lin 2007-01-02
7060573 Extended poly buffer STI scheme Victor Lim, Lap Chan, Wang Ling Goh 2006-06-13 $118,000
6964598 Polishing apparatus and method for forming an integrated circuit Lup San Leong, Charles Lin 2005-11-15 $309,000
6664190 Pre STI-CMP planarization scheme Cheng-Hou Loh, Paul Proctor 2003-12-16 $206,000
6613648 Shallow trench isolation using TEOS cap and polysilicon pullback Seng-Keong Victor Lim, Kong Hean Lee, Wang Ling Goh 2003-09-02 $245,000
6613649 Method for buffer STI scheme with a hard mask layer as an oxidation barrier Seng-Keong Victor Lim, Alex See, Wang Ling Goh 2003-09-02 $245,000
6528886 Intermetal dielectric layer for integrated circuits Huang Liu, John Sudijono, Juan Boon Tan, Edwin Goh, Alan Cuthbertson +3 more 2003-03-04
6451687 Intermetal dielectric layer for integrated circuits Huang Liu, John Sudijono, Juan Boon Tan, Edwin Goh, Alan Cuthbertson +3 more 2002-09-17
6443809 Polishing apparatus and method for forming an integrated circuit Lup San Leong, Charles Lin 2002-09-03 $667,000
6376376 Method to prevent CU dishing during damascene formation Victor Lim, Wang Ling Goh 2002-04-23 $411,000
6376378 Polishing apparatus and method for forming an integrated circuit Lup San Leong, Charles Lin 2002-04-23 $411,000
6306723 Method to form shallow trench isolations without a chemical mechanical polish Kok Hin Teo 2001-10-23 $695,000
6284644 IMD scheme by post-plasma treatment of FSG and TEOS oxide capping layer Arthur Khoon Siah Aug, Qiong Li 2001-09-04 $414,000
6281082 Method to form MOS transistors with a common shallow trench isolation and interlevel dielectric gap fill Kok Hin Teo, Kok Hiang Tang, Alex See 2001-08-28 $1,200,000
6274485 Method to reduce dishing in metal chemical-mechanical polishing Rick Teo, Lap Chan 2001-08-14 $1,252,000
6204137 Method to form transistors and local interconnects using a silicon nitride dummy gate technique Kok Hin Teo, Alex See, Lap Chan 2001-03-20 $6,654,000
6103569 Method for planarizing local interconnects Kok Hin Teo, Lap Chan 2000-08-15 $23,830,000