HR

Hari Anand Ravi

CS Cadence Design Systems: 12 patents #85 of 2,263Top 4%
IN Intuit: 1 patents #1,256 of 2,496Top 55%
📍 Survanagiri, NJ: #1 of 5 inventorsTop 20%
Overall (All Time): #330,270 of 4,157,543Top 8%
14
Patents All Time

Issued Patents All Time

Showing 1–14 of 14 patents

Patent #TitleCo-InventorsDate
12413213 Efficient clocking structures for high-speed systems using hybrid digital delay lanes Jitendra Kumar Yadav, Sachin Ramesh Gugwad, Hajee Mohammed Shuaeb Fazeel 2025-09-09
12339888 Unified insights engine Arnab Manna 2025-06-24
12289111 System and method using a fast settling accumulator 2025-04-29
12205673 Read data strobe path having variation compensation and delay lines Sachin Ramesh Gugwad, Jitendra Kumar Yadav, Thomas Evan Wilson, Vinod Kumar 2025-01-21
12184286 Clock duty cycle measurement Prakash Kumar Lenka, Jitendra Kumar Yadav 2024-12-31
12183427 System and method for write clock double data rate duty cycle correction Sachin Ramesh Gugwad 2024-12-31
11979262 Identifying and training floating tap for decision feedback equalization Sachin Ramesh Gugwad 2024-05-07
11580048 Reference voltage training scheme Thomas Evan Wilson, Scott David Huss, Sachin Ramesh Gugwad, Balbeer Singh Rathor 2023-02-14
11483185 Hardware efficient decision feedback equalization training Sachin Ramesh Gugwad, Aaron Willey, Thomas Evan Wilson 2022-10-25
11323296 Decision feedback equalization training scheme for GDDR applications Sachin Ramesh Gugwad, Thomas Evan Wilson, Vinod Kumar 2022-05-03
10566046 Protocol compliant high-speed DDR transmitter Vinod Kumar, Thomas Evan Wilson 2020-02-18
10545895 Auto-zeroing receiver for memory interface devices Aaron Willey, H. Md. Shuaeb Fazeel, Thomas Evan Wilson, Moo Sung Chae 2020-01-28
9767888 Methods and devices for high-sensitivity memory interface receiver Thomas Evan Wilson, Balbeer Singh Rathor 2017-09-19
8732299 Scalability breakpoint calculator for a software product Ray Y. Lai, Anjaneya Vara Vankayala Venkata 2014-05-20