SG

Sachin Ramesh Gugwad

CS Cadence Design Systems: 10 patents #117 of 2,263Top 6%
Overall (All Time): #476,841 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
12413213 Efficient clocking structures for high-speed systems using hybrid digital delay lanes Jitendra Kumar Yadav, Hari Anand Ravi, Hajee Mohammed Shuaeb Fazeel 2025-09-09
12205673 Read data strobe path having variation compensation and delay lines Hari Anand Ravi, Jitendra Kumar Yadav, Thomas Evan Wilson, Vinod Kumar 2025-01-21
12183427 System and method for write clock double data rate duty cycle correction Hari Anand Ravi 2024-12-31
11979262 Identifying and training floating tap for decision feedback equalization Hari Anand Ravi 2024-05-07
11580048 Reference voltage training scheme Thomas Evan Wilson, Scott David Huss, Hari Anand Ravi, Balbeer Singh Rathor 2023-02-14
11483185 Hardware efficient decision feedback equalization training Hari Anand Ravi, Aaron Willey, Thomas Evan Wilson 2022-10-25
11323296 Decision feedback equalization training scheme for GDDR applications Hari Anand Ravi, Thomas Evan Wilson, Vinod Kumar 2022-05-03
11277285 Continuous time linear equalization system and method Jaya Madhaba Panda 2022-03-15
10771108 Crosstalk cancellation in a receiver H Md Shuaeb Fazeel 2020-09-08
9754646 Voltage stress tolerant high speed memory driver having flying capacitor circuit Vinod Kumar, Tara Vishin, Thomas Evan Wilson 2017-09-05