FP

Fabiano Peixoto

CS Cadence Design Systems: 9 patents #141 of 2,263Top 7%
JA Jasper Design Automation: 1 patents #22 of 35Top 65%
📍 Belo Horizonte, BR: #4 of 416 inventorsTop 1%
Overall (All Time): #503,773 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
10796051 Adaptive model interface for a plurality of EDA programs Abner Luis Panho Marciano, Matheus Nogueira Fonseca, Thamara Karen Cunha Andrade, Raquel Lara dos Santos Pereira, Rodolfo Santos Teixeira +2 more 2020-10-06
10769008 Systems and methods for automatic formal metastability fault analysis in an electronic design Alberto Manuel Arias Drake, Andrea Iabrudi Tavares, Artur Melo Mota Costa, Laiz Lipiainen Santos, Lucas Ferreira de Melo Diniz +4 more 2020-09-08
10540467 System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design Craig Franklin Deaton, Abner Luis Panho Marciano, Matheus Nogueira Fonseca, Ronalu Augusta Nunes Barcelos 2020-01-21
10204201 Methods, systems, and articles of manufacture for verifying an electronic design using hierarchical clock domain crossing verification techniques Lawrence Loh, Artur Melo Mota Costa, Breno Rodrigues Guimaraes, Andrea Iabrudi Tavares 2019-02-12
10162917 Method and system for implementing selective transformation for low power verification Benjamin Chen, Chung-Wah Norris Ip, Björn Håkan Hjort 2018-12-25
10078714 Data propagation analysis for debugging a circuit design Breno Rodrigues Guimaraes, Xiaoyang Sun, Claudionor Coelho 2018-09-18
9817930 Method, system, and computer program product for verifying an electronic circuit design with a graph-based proof flow Caio Araújo Teixeira Campos, Tamires Vargas Campanema Franco Santos, Andrea Iabrudi Tavares, Claudionor Coelho 2017-11-14
9665682 Methods, systems, and articles of manufacture for enhancing formal verification with counter acceleration for electronic designs Breno Rodrigues Guimaraes, Abner Luis Panho Marciano 2017-05-30
9633151 Methods, systems, and computer program product for verifying electronic designs with clock domain crossing paths Xiaoyang Sun, Marcus Vinicius da Mata Gomes, Andrea Iabrudi Tavares, Lawrence Loh 2017-04-25
8572527 Generating properties for circuit designs Claudionor Coelho 2013-10-29