Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10540467 | System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design | Craig Franklin Deaton, Abner Luis Panho Marciano, Matheus Nogueira Fonseca, Fabiano Peixoto | 2020-01-21 |
| 10289798 | System, method, and computer program product for property clustering associated with formal verification of an electronic circuit design | Hudson Dyele Pinheiro de Oliveira, Mirlaine Aparecida Crepalde, Lucas Luz Reckziegel, Glauber Tadeu de Sousa Carmo, Augusto Amaral Mafra +3 more | 2019-05-14 |