Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10540467 | System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design | Craig Franklin Deaton, Matheus Nogueira Fonseca, Ronalu Augusta Nunes Barcelos, Fabiano Peixoto | 2020-01-21 |
| 9858372 | Methods, systems, and computer program product for verifying an electronic design | Hudson Dyele Oliveira, Guilherme Seminotti Braga, Caio Texeira Campos, Breno Rodrigues Guimares, Rodrigo Fonseca Rocha Soares +3 more | 2018-01-02 |
| 9665682 | Methods, systems, and articles of manufacture for enhancing formal verification with counter acceleration for electronic designs | Breno Rodrigues Guimaraes, Fabiano Peixoto | 2017-05-30 |