CD

Craig Franklin Deaton

CS Cadence Design Systems: 5 patents #303 of 2,263Top 15%
JA Jasper Design Automation: 4 patents #9 of 35Top 30%
📍 Rowlett, TX: #25 of 304 inventorsTop 9%
🗺 Texas: #16,798 of 125,132 inventorsTop 15%
Overall (All Time): #550,784 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
11580284 System, method, and computer program product for finding and analyzing deadlock conditions associated with the formal verification of an electronic circuit design Christopher William Komar, Lars Lundgren 2023-02-14
11138355 Unreachable cover root cause search Maayan Ziv, Kanwar Pal Singh, Nizar Hanna, Gasob Mazzawi 2021-10-05
10540467 System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design Abner Luis Panho Marciano, Matheus Nogueira Fonseca, Ronalu Augusta Nunes Barcelos, Fabiano Peixoto 2020-01-21
10380312 System, method, and computer program product for analyzing formal constraint conflicts Lars Lundgren 2019-08-13
9372949 Guided exploration of circuit design states Ziyad Hanna, Kathryn Drews Kranen, Björn Håkan Hjort, Lars Lundgren 2016-06-21
8831925 Indexing behaviors and recipes of a circuit design Kathryn Drews Kranen, Chung-Wah Norris Ip, Rajeev Ranjan, Lawrence Loh, Beth C. Isaksen +1 more 2014-09-09
8731894 Indexing behaviors and recipes of a circuit design Kathryn Drews Kranen, Chung-Wah Norris Ip, Rajeev Ranjan, Lawrence Loh, Beth C. Isaksen +1 more 2014-05-20
8671373 Analysis of circuit designs via trace signatures 2014-03-11
8630824 Comprehending waveforms of a circuit design Chung-Wah Norris Ip, Kathryn Drews Kranen, Rajeev Ranjan, Beth C. Isaksen, Karl Stefan Esbjörner 2014-01-14