MG

Marcus Vinicius da Mata Gomes

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 San Jose, CA: #14,517 of 32,062 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,490,022 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
9633151 Methods, systems, and computer program product for verifying electronic designs with clock domain crossing paths Xiaoyang Sun, Andrea Iabrudi Tavares, Lawrence Loh, Fabiano Peixoto 2017-04-25
9594861 Method and system to perform equivalency checks Antonio Celso Caldeira, Jr., Lawrence Loh 2017-03-14
9342638 Method and system to perform performance checks Antonio Celso Caldeira, Jr., Rajeev Ranjan 2016-05-17