| 7475176 |
High bandwidth split bus |
Lief O'Donnell |
2009-01-06 |
$9,370,000 |
| 7274706 |
Methods and systems for processing network data |
Tung Nguyen, Paul J. Jordan, Syrus Ziai, Al Chang, Greg F. Grohoski |
2007-09-25 |
|
| 7120752 |
Multi-processor computer system with cache-flushing system using memory recall |
Kenneth Mark Wilson, Lance W. Russell, Tung Nguyen, Lu Xu |
2006-10-10 |
$18,158,000 |
| 6976205 |
Method and apparatus for calculating TCP and UDP checksums while preserving CPU resources |
Syrus Ziai, Paul J. Jordan, Craig Robson, Ryan Patrick Donohue |
2005-12-13 |
|
| 6880045 |
Multi-processor computer system with transactional memory |
Lance W. Russell, Tung Nguyen |
2005-04-12 |
$10,309,000 |
| 6874065 |
Cache-flushing engine for distributed shared memory multi-processor computer systems |
Lance W. Russell, Tung Nguyen |
2005-03-29 |
$9,208,000 |
| 6851074 |
System and method for recovering from memory failures in computer systems |
Dejan S. Miloiicic, Thomas Wylegala, Stephen Hoyle, Lance W. Russell, Lu Xu +1 more |
2005-02-01 |
$12,353,000 |
| 6745294 |
Multi-processor computer system with lock driven cache-flushing system |
Kenneth Mark Wilson, Lance W. Russell, Tung Nguyen, Lu Xu |
2004-06-01 |
$11,048,000 |
| 6728843 |
System and method for tracking and processing parallel coherent memory accesses |
Tung Nguyen |
2004-04-27 |
$9,849,000 |
| 6675262 |
Multi-processor computer system with cache-flushing system using memory recall |
Kenneth Mark Wilson, Lance W. Russell, Tung Nguyen, Lu Xu |
2004-01-06 |
$15,903,000 |
| 6654854 |
Caching method using cache tag and cache data stored in dynamic RAM embedded in logic chip |
Gopalakrishnan Janakiraman |
2003-11-25 |
$10,437,000 |
| 6516343 |
Computer system and method for enhancing memory-to-memory copy transactions by utilizing multiple system control units |
Tung Nguyen |
2003-02-04 |
|
| 6490662 |
System and method for enhancing the reliability of a computer system by combining a cache sync-flush engine with a replicated memory module |
Tung Nguyen |
2002-12-03 |
$20,488,000 |
| 6449690 |
Caching method using cache data stored in dynamic RAM embedded in logic chip and cache tag stored in static RAM external to logic chip |
Gopalakrishnan Janakiraman |
2002-09-10 |
$20,407,000 |
| 6360231 |
Transactional memory for distributed shared memory multi-processor computer systems |
Lance W. Russell, Tung Nguyen |
2002-03-19 |
$17,590,000 |
| 6341337 |
Apparatus and method for implementing a snoop bus protocol without snoop-in and snoop-out logic |
— |
2002-01-22 |
$70,108,000 |
| 6253291 |
Method and apparatus for relaxing the FIFO ordering constraint for memory accesses in a multi-processor asynchronous cache system |
Rick C. Hetherington |
2001-06-26 |
$76,344,000 |
| 6199142 |
Processor/memory device with integrated CPU, main memory, and full width cache and associated method |
Ashley Saulsbury, Andreas Nowatzyk |
2001-03-06 |
$150,115,000 |
| 6128702 |
Integrated processor/memory device with victim data cache |
Ashley Saulsbury, Andreas Nowatzyk |
2000-10-03 |
$279,930,000 |
| 6119205 |
Speculative cache line write backs to avoid hotspots |
Thomas M. Wicki, Meera Kasinathan, Ricky C. Hetherington |
2000-09-12 |
$189,801,000 |
| 6073212 |
Reducing bandwidth and areas needed for non-inclusive memory hierarchy by using dual tags |
Norman M. Hayes, Belliappa Kuttanna, Krishna M. Thatipelli, Ricky C. Hetherington |
2000-06-06 |
$189,081,000 |
| 5909697 |
Reducing cache misses by snarfing writebacks in non-inclusive memory systems |
Norman M. Hayes, Ricky C. Hetherington, Belliappa Kuttanna, Krishna M. Thatipelli |
1999-06-01 |
$83,247,000 |
| 5900011 |
Integrated processor/memory device with victim data cache |
Ashley Saulsbury, Andreas Nowatzyk |
1999-05-04 |
$37,282,000 |
