Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7066657 | Optical subassembly | Venkatesan Murali, Douglas E. Crafts, Brett M. Zaborsky, Siegfried Fleischer | 2006-06-27 |
| 6927370 | Electromagnetic hemming machine and method for joining sheet metal layers | John L. McClure, James P. Lezotte | 2005-08-09 |
| 6778727 | Optic switch | Venkatesan Murali | 2004-08-17 |
| 6697553 | Compact, low insertion loss, high yield arrayed waveguide grating | Jyoti Kiron Bhardwaj, Robert J. Brainard, David J. Chapman, Douglas E. Crafts, Zi-Wen Dong +13 more | 2004-02-24 |
| 6687427 | Optic switch | Venkatesan Murali | 2004-02-03 |
| 6664511 | Package for optical components | Douglas E. Crafts, James F. Farrell, Mark Farrelly, Kenzo Ishida | 2003-12-16 |
| 6606425 | Transfer molded packages with embedded thermal insulation | Douglas E. Crafts, Kenzo Ishida, David J. Chapman, Duane Cook, James F. Farrell +1 more | 2003-08-12 |
| 6528345 | Process line for underfilling a controlled collapse | Duane Cook | 2003-03-04 |
| 6525922 | High performance via capacitor and method for manufacturing same | Paul Winer, Richard H. Livengood | 2003-02-25 |
| 6490166 | Integrated circuit package having a substrate vent hole | Nagesh Vodrahalli, Michael J. Costello, Mun Leong Loke, Ravi Mahajan | 2002-12-03 |
| 6486440 | Redundant package for optical components | Douglas E. Crafts, James F. Farrell, Mark Farrelly | 2002-11-26 |
| 6331446 | Process for underfilling a controlled collapse chip connection (C4) integrated circuit package with an underfill material that is heated to a partial gel state | Duane Cook, Venkatesan Murali, Nagesh Vodrahalli | 2001-12-18 |
| 6238948 | Controlled collapse chip connection (C4) integrated circuit package that has a fillet which seals an underfill material | — | 2001-05-29 |