Issued Patents All Time
Showing 126–150 of 250 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7187201 | Programmable logic device suitable for implementation in molecular electronics | — | 2007-03-06 |
| 7183799 | Physically-enforced time-limited cores and method of operation | Adam P. Donlin | 2007-02-27 |
| 7162644 | Methods and circuits for protecting proprietary configuration data for programmable logic devices | — | 2007-01-09 |
| 7143332 | Methods and structures for providing programmable width and error correction in memory arrays in programmable logic devices | — | 2006-11-28 |
| 7143295 | Methods and circuits for dedicating a programmable logic device for use with specific designs | — | 2006-11-28 |
| 7143329 | FPGA configuration memory with built-in error correction mechanism | Austin H. Lesea, Derek R. Curd | 2006-11-28 |
| 7138827 | Programmable logic device with time-multiplexed interconnect | — | 2006-11-21 |
| 7134025 | Methods and circuits for preventing the overwriting of memory frames in programmable logic devices | — | 2006-11-07 |
| 7117372 | Programmable logic device with decryption and structure for preventing design relocation | Raymond C. Pang, Walter N. Sze, Jennifer Wong | 2006-10-03 |
| 7117373 | Bitstream for configuring a PLD with encrypted design data | Raymond C. Pang, Walter N. Sze, Jennifer Wong, Kameswara K. Rao | 2006-10-03 |
| 7111215 | Methods of reducing the susceptibility of PLD designs to single event upsets | Eric R. Keller, Prasanna Sundararajan | 2006-09-19 |
| 7111224 | FPGA configuration memory with built-in error correction mechanism | — | 2006-09-19 |
| 7103685 | Bitstream compression with don't care values | — | 2006-09-05 |
| 7089527 | Structures and methods for selectively applying a well bias to portions of a programmable device | Michael J. Hart, Steven P. Young | 2006-08-08 |
| 7058177 | Partially encrypted bitstream method | Raymond C. Pang, Walter N. Sze | 2006-06-06 |
| 7047509 | Programmable logic device with time-multiplexed interconnect | — | 2006-05-16 |
| 7047465 | Methods for using defective programmable logic devices by customizing designs based on recorded defects | — | 2006-05-16 |
| 6996713 | Method and apparatus for protecting proprietary decryption keys for programmable logic devices | — | 2006-02-07 |
| 6981153 | Programmable logic device with method of preventing readback | Raymond C. Pang, Walter N. Sze, John M. Thendean, Jennifer Wong | 2005-12-27 |
| 6980026 | Structures and methods for reducing power consumption in programmable logic devices | — | 2005-12-27 |
| 6965675 | Structure and method for loading encryption keys through a test access port | Raymond C. Pang, John M. Thendean | 2005-11-15 |
| 6963510 | Programmable capacitor and method of operating same | — | 2005-11-08 |
| 6957340 | Encryption key for multi-key encryption in programmable logic device | Raymond C. Pang, Jennifer Wong | 2005-10-18 |
| 6944842 | Method for making large-scale ASIC using pre-engineered long distance routing structure | — | 2005-09-13 |
| 6931543 | Programmable logic device with decryption algorithm and decryption key | Raymond C. Pang, Walter N. Sze, Jennifer Wong, John M. Thendean, Kameswara K. Rao | 2005-08-16 |