Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Padmini Gopalakrishnan — 6 Patents

AMD: 4 patents #2,984 of 9,280Top 35%
MSMonterey Design Systems: 2 patents #12 of 38Top 35%
Sunnyvale, CA: #4,229 of 14,302 inventorsTop 30%
California: #94,478 of 386,348 inventorsTop 25%
Overall (All Time): #779,687 of 4,157,543Top 20%
6 Patents All Time
Padmini Gopalakrishnan has been granted 6 US patents while listed as an inventor at AMD. The first was granted in 2003 and the most recent in August 2023. Padmini Gopalakrishnan ranks #779,687 of 4,157,543 US inventors in our database (top 18.8%). Patent records list Padmini Gopalakrishnan in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11714950 Automated timing closure on circuit designs Veeresh Pratap Singh, Meghraj Kalase, John Blaine, Srinivasan Dasasathyan, Frederic Revenu +4 more 2023-08-01
11586791 Visualization of data buses in circuit designs Anup Hosangadi, Aman Gayasen, Srinivasan Dasasathyan 2023-02-21
11003826 Automated analysis and optimization of circuit designs Srinivasan Dasasathyan, Vishal Tripathy, Vikas N. Vedamurthy, Sumit Nagpal 2021-05-11 $29,817,000
10867093 System and method for an electronic design tool providing automated guidance and interface for circuit design processing John Blaine, Srinivasan Dasasathyan, Meghraj Kalase, Frederic Revenu, Veeresh Pratap Singh +4 more 2020-12-15 $77,795,000
6775808 Method and apparatus for generating sign-off prototypes for the design and fabrication of integrated circuits Salil Ravindra Raje, Lawrence Pileggi, Dinesh D. Gaitonde, Olivier Coudert, Jackson David Kreiter 2004-08-10
6523161 Method to optimize net lists using simultaneous placement and logic optimization Salil Ravindra Raje 2003-02-18