Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 11714950 | Automated timing closure on circuit designs | Veeresh Pratap Singh, Meghraj Kalase, Srinivasan Dasasathyan, Padmini Gopalakrishnan, Frederic Revenu +4 more | 2023-08-01 | |
| 10867093 | System and method for an electronic design tool providing automated guidance and interface for circuit design processing | Srinivasan Dasasathyan, Meghraj Kalase, Frederic Revenu, Veeresh Pratap Singh, Satish Bachina +4 more | 2020-12-15 | $77,795,000 |