Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10229744 | First read countermeasures in memory | Deepanshu Dutta, Idan Alrod, Huai-Yuan Tseng, Amul Desai, Jun Wan +1 more | 2019-03-12 |
| 10026486 | First read countermeasures in memory | Deepanshu Dutta, Idan Alrod, Huai-Yuan Tseng, Amul Desai, Jun Wan +1 more | 2018-07-17 |
| 7672803 | Input of test conditions and output generation for built-in self test | Mimi Lee, Darlene Hamilton | 2010-03-02 |
| 7415646 | Page—EXE erase algorithm for flash memory | Mimi Lee, Darlene Hamilton | 2008-08-19 |
| 7284167 | Automated tests for built-in self test | Mimi Lee, Darlene Hamilton, Kendra Nguyen, Xin Guo | 2007-10-16 |
| 7158442 | Flexible latency in flash memory | Jih Hong Beh | 2007-01-02 |
| 7028240 | Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine | Edward V. Bautista, Jr., Colin S. Bill | 2006-04-11 |
| 7010736 | Address sequencer within BIST (Built-in-Self-Test) system | Boon Tang Teh, Edward V. Bautista, Jr., Colin S. Bill, Joseph Kucera, Weng Fook Lee +1 more | 2006-03-07 |
| 6980473 | Memory device and method | Edward V. Bautista, Jr., Chi Mun Ho | 2005-12-27 |
| 6973003 | Memory device and method | Syahrizal Salleh, Edward V. Bautista, Jr. | 2005-12-06 |
| 6970368 | CAM (content addressable memory) cells as part of core array in flash memory device | Edward V. Bautista, Jr. | 2005-11-29 |
| 6891752 | System and method for erase voltage control during multiple sector erase of a flash memory device | Edward V. Bautista, Jr., Weng Fook Lee | 2005-05-10 |
| 6771093 | Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor | Edward V. Bautista, Jr., Weng Fook Lee | 2004-08-03 |
| 6707718 | Generation of margining voltage on-chip during testing CAM portion of flash memory device | Azrul Halim, Colin S. Bill, Syahrizal Salleh | 2004-03-16 |
| 6665214 | On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode | Edward V. Bautista, Jr., Weng Fook Lee, Boon Tang Teh | 2003-12-16 |
| 6631086 | On-chip repair of defective address of core flash memory cells | Colin S. Bill, Edward V. Bautista, Jr., Azrul Halim, Darlene Hamilton | 2003-10-07 |
| 6243291 | Two-stage pipeline sensing for page mode flash memory | — | 2001-06-05 |