| 7057949 |
Method and apparatus for pre-charging negative pump MOS regulation capacitors |
Feng Pan, Edward V. Bautista, Jr., Santosh Yachareni |
2006-06-06 |
| 7010736 |
Address sequencer within BIST (Built-in-Self-Test) system |
Boon Tang Teh, Edward V. Bautista, Jr., Ken Cheong Cheah, Colin S. Bill, Joseph Kucera +1 more |
2006-03-07 |
| 6891752 |
System and method for erase voltage control during multiple sector erase of a flash memory device |
Edward V. Bautista, Jr., Ken Cheong Cheah |
2005-05-10 |
| 6771093 |
Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor |
Edward V. Bautista, Jr., Ken Cheong Cheah |
2004-08-03 |
| 6665214 |
On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode |
Ken Cheong Cheah, Edward V. Bautista, Jr., Boon Tang Teh |
2003-12-16 |
| 6654349 |
Real time automated checking mechanism for a bus protocol on an integrated bus system |
— |
2003-11-25 |
| 6622274 |
Method of micro-architectural implementation on bist fronted state machine utilizing ‘death logic’ state transition for area minimization |
Colin S. Bill, Feng Pan, Edward V. Bautista, Jr. |
2003-09-16 |
| 6587982 |
Method of micro-architectural implementation of interface between bist state machine and tester interface to enable bist cycling |
Colin S. Bill, Feng Pan, Edward V. Bautista, Jr., Azrul Halim |
2003-07-01 |
| 6577042 |
Feedback control system for ultrasound probe |
John Popow, Phil Bell, Uri Rosenschein, Richard F. Klein |
2003-06-10 |
| 6549477 |
System and method to facilitate stabilization of reference voltage signals in memory devices |
Edward V. Bautista, Jr., Santosh Yachareni |
2003-04-15 |
| 6546410 |
High-speed hexadecimal adding method and system |
— |
2003-04-08 |
| 6532175 |
Method and apparatus for soft program verification in a memory device |
Santosh Yachareni, Edward V. Bautista, Jr. |
2003-03-11 |
| 6459628 |
System and method to facilitate stabilization of reference voltage signals in memory devices |
Edward V. Bautista, Jr., Santosh Yachareni |
2002-10-01 |
| 6385093 |
I/O partitioning system and methodology to reduce band-to-band tunneling current during erase |
Edward V. Bautista, Jr., Kazuhiro Kurihara, Feng Pan, Ravi Sunkavalli, Darlene Hamilton |
2002-05-07 |
| 6331951 |
Method and system for embedded chip erase verification |
Edward V. Bautista, Jr., Darlene Hamilton, Pau-Ling Chen, Keith H. Wong |
2001-12-18 |
