EJ

Edward V. Bautista, Jr.

AM AMD: 21 patents #507 of 9,279Top 6%
Fujitsu Limited: 2 patents #10,930 of 24,456Top 45%
SL Spansion Llc.: 1 patents #435 of 769Top 60%
Overall (All Time): #197,662 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDate
8117521 Implementation of recycling unused ECC parity bits during flash memory programming Allan Parker, Tan Tat Hin, Murni Mohd-Salleh 2012-02-14
7057949 Method and apparatus for pre-charging negative pump MOS regulation capacitors Feng Pan, Weng Fook Lee, Santosh Yachareni 2006-06-06
7028240 Diagnostic mode for testing functionality of BIST (built-in-self-test) back-end state machine Ken Cheong Cheah, Colin S. Bill 2006-04-11
7010736 Address sequencer within BIST (Built-in-Self-Test) system Boon Tang Teh, Ken Cheong Cheah, Colin S. Bill, Joseph Kucera, Weng Fook Lee +1 more 2006-03-07
6980473 Memory device and method Ken Cheong Cheah, Chi Mun Ho 2005-12-27
6973003 Memory device and method Syahrizal Salleh, Ken Cheong Cheah 2005-12-06
6970368 CAM (content addressable memory) cells as part of core array in flash memory device Ken Cheong Cheah 2005-11-29
6891752 System and method for erase voltage control during multiple sector erase of a flash memory device Ken Cheong Cheah, Weng Fook Lee 2005-05-10
6771093 Implementing reference current measurement mode within reference array programming mode or reference array erase mode in a semiconductor Ken Cheong Cheah, Weng Fook Lee 2004-08-03
6665214 On-chip erase pulse counter for efficient erase verify BIST (built-in-self-test) mode Ken Cheong Cheah, Weng Fook Lee, Boon Tang Teh 2003-12-16
6631086 On-chip repair of defective address of core flash memory cells Colin S. Bill, Ken Cheong Cheah, Azrul Halim, Darlene Hamilton 2003-10-07
6622274 Method of micro-architectural implementation on bist fronted state machine utilizing ‘death logic’ state transition for area minimization Weng Fook Lee, Colin S. Bill, Feng Pan 2003-09-16
6587982 Method of micro-architectural implementation of interface between bist state machine and tester interface to enable bist cycling Weng Fook Lee, Colin S. Bill, Feng Pan, Azrul Halim 2003-07-01
6549477 System and method to facilitate stabilization of reference voltage signals in memory devices Weng Fook Lee, Santosh Yachareni 2003-04-15
6532175 Method and apparatus for soft program verification in a memory device Santosh Yachareni, Weng Fook Lee 2003-03-11
6459628 System and method to facilitate stabilization of reference voltage signals in memory devices Weng Fook Lee, Santosh Yachareni 2002-10-01
6385093 I/O partitioning system and methodology to reduce band-to-band tunneling current during erase Kazuhiro Kurihara, Feng Pan, Weng Fook Lee, Ravi Sunkavalli, Darlene Hamilton 2002-05-07
6331951 Method and system for embedded chip erase verification Darlene Hamilton, Weng Fook Lee, Pau-Ling Chen, Keith H. Wong 2001-12-18
6324108 Application of external voltage during array VT testing Colin S. Bill, Shigekazu Yamada 2001-11-27
6285594 Wordline voltage protection Colin S. Bill, Santosh Yachareni 2001-09-04
6269026 Charge sharing to help boost the wordlines during APDE verify Bhimachar Venkatesh 2001-07-31
6212098 Voltage protection of write protect cams Santosh Yachareni 2001-04-03