VB

Veeraraghavan S. Basker

IBM: 8 patents #71 of 3,866Top 2%
AS Adeia Semiconductor Solutions: 1 patents #10 of 44Top 25%
📍 Schenectady, NY: #3 of 75 inventorsTop 4%
🗺 New York: #113 of 9,062 inventorsTop 2%
Overall (2025): #6,851 of 469,880Top 2%
9
Patents 2025

Issued Patents 2025

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
12432960 Wraparound contact with reduced distance to channel Ruilong Xie, Reinaldo Vega, Yao Yao, Andrew M. Greene, Pietro Montanini +2 more 2025-09-30
12417944 Formation of trench silicide source or drain contacts without gate damage Andrew M. Greene, Ruilong Xie, Laertis Economikos, Chanro Park, Hui Zang 2025-09-16
12414328 Co-integrating gate-all-around nanosheet transistors and comb-nanosheet transistors Huimei Zhou, Julien Frougier, Nicolas Loubet, Ruilong Xie, Miaomiao Wang 2025-09-09
12376369 FinFET devices Kangguo Cheng, Theodorus E. Standaert, Junli Wang 2025-07-29
12324184 Replacement gate cross-couple for static random-access memory scaling Ruilong Xie, Carl Radens, Kangguo Cheng, Juntao Li 2025-06-03
12317555 Gate-all-around nanosheet field effect transistor integrated with fin field effect transistor Julien Frougier, Sagarika Mukesh, Ruqiang Bao, Andrew M. Greene, Jingyun Zhang +1 more 2025-05-27
12310054 Late replacement bottom isolation for nanosheet devices Ruilong Xie, Andrew M. Greene, Julien Frougier 2025-05-20
12255204 Vertical FET replacement gate formation with variable fin pitch Ruilong Xie, Yao Yao, Andrew M. Greene 2025-03-18
12224312 Field effect transistors with bottom dielectric isolation Julien Frougier, Ruilong Xie, Andrew M. Greene 2025-02-11