Issued Patents 2025
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406956 | Bilayer memory stacking with computer logic circuits shared between bottom and top memory layers | Abhishek A. Sharma, Van H. Le, Kimin Jun, Wilfred Gomes | 2025-09-02 |
| 12396155 | Backend memory with air gaps in upper metal layers | Abhishek A. Sharma, Albert Chen, Wilfred Gomes, Fatih Hamzaoglu, Travis W. Lajoie +3 more | 2025-08-19 |
| 12376342 | Passivation layers for thin film transistors | Abhishek A. Sharma, Arnab Sen Gupta, Travis W. Lajoie, Sarah Atanasov, Chieh-Jen Ku +5 more | 2025-07-29 |
| 12310032 | Stacked backend memory with resistive switching devices | Wilfred Gomes, Abhishek A. Sharma, Van H. Le | 2025-05-20 |
| 12300537 | Conformal low temperature hermetic dielectric diffusion barriers | Sean King, Sreenivas Kosaraju, Timothy E. Glassman | 2025-05-13 |
| 12266568 | Interconnect wires including relatively low resistivity cores | Tejaswi K. Indukuri, Ramanan V. Chebiam, James S. Clarke | 2025-04-01 |
| 12255137 | Sideways vias in isolation areas to contact interior layers in stacked devices | Ehren Mannebach, Aaron D. Lilak, Patrick Morrow, Anh Phan, Willy Rachmady +3 more | 2025-03-18 |
| 12224202 | Forming an oxide volume within a fin | Cheng-Ying Huang, Gilbert Dewey, Jack T. Kavalieros, Aaron D. Lilak, Ehren Mannebach +3 more | 2025-02-11 |