Issued Patents 2024
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12167614 | Techniques for MRAM MTJ top electrode to via interface | Hung Cho Wang, Jiunyu Tsai, Sheng-Huang Huang | 2024-12-10 |
| 12136627 | 3DIC structure for high voltage device on a SOI substrate | Wen-Tuo Huang, Hsin Fu Lin, Wei-Cheng Wu | 2024-11-05 |
| 12133470 | Semiconductor structure and method of forming the same | Kuei-Hung Shen, Chern-Yow Hsu, Shih-Chang Liu | 2024-10-29 |
| 12107001 | Semiconductor feature and method for manufacturing the same | Chung-Jen Huang, Wen-Tuo Huang, Wei-Cheng Wu | 2024-10-01 |
| 12068313 | Semiconductor arrangement and formation thereof | Wei-Cheng Wu, Shih-Chang Liu, Ming Chyi Liu | 2024-08-20 |
| 12069963 | Magnetic random access memory device and formation method thereof | Sheng-Chang Chen, Hung Cho Wang, Sheng-Huang Huang | 2024-08-20 |
| 12027420 | Etch stop layer for memory device formation | Sheng-Huang Huang, Chung-Chiang Min, Hung Cho Wang, Sheng-Chang Chen | 2024-07-02 |
| 12015029 | Method to embed planar FETs with finFETs | Wei-Cheng Wu, Li-Feng Teng, Li-Jung Liu | 2024-06-18 |
| 11978740 | Semiconductor-on-insulator (SOI) semiconductor structures including a high-k dielectric layer and methods of manufacturing the same | Kuo-Ching Huang, Wei-Cheng Wu, Hsin Fu Lin, Henry Wang, Chien-Hung Liu +2 more | 2024-05-07 |
| 11961826 | Bonded wafer device structure and methods for making the same | Wei-Cheng Wu, Wen-Tuo Huang | 2024-04-16 |
| 11935918 | High voltage device with boosted breakdown voltage | Hsin Fu Lin, Tsung-Hao Yeh | 2024-03-19 |
| 11930645 | Semiconductor structure integrated with magnetic tunneling junction | Alexander Kalnitsky, Sheng-Haung Huang, Tien-Wei Chiang | 2024-03-12 |
| 11910619 | Method for MRAM top electrode connection | Hung Cho Wang, Sheng-Chang Chen, Sheng-Huang Huang | 2024-02-20 |
| 11903191 | Embedded flash memory device with floating gate embedded in a substrate | Wei-Cheng Wu | 2024-02-13 |
| 11894443 | Method of making gate structure of a semiconductor device | Ming Zhu, Hui-Wen Lin, Bao-Ru Young, Yuan-Sheng Huang, Ryan Chia-Jen Chen +4 more | 2024-02-06 |
| 11894448 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Yi-Ren Chen, Chi-Wen Liu, Chao-Hsiung Wang, Ming Zhu | 2024-02-06 |
| 11889769 | Memory cell with top electrode via | Ming-Che Ku, Hung Cho Wang, Tsun Chung Tu, Jiunyu Tsai, Sheng-Huang Huang | 2024-01-30 |
| 11869800 | Method for fabricating a semiconductor device | Bao-Ru Young, Wei-Cheng Wu, Meng-Fang Hsu, Kong-Pin Chang, Chia Ming Liang | 2024-01-09 |