KM

Kishore Kumar Muchherla

Micron: 85 patents #1 of 1,593Top 1%
📍 San Jose, CA: #5 of 6,843 inventorsTop 1%
🗺 California: #59 of 67,585 inventorsTop 1%
Overall (2023): #113 of 537,848Top 1%
85
Patents 2023

Issued Patents 2023

Showing 26–50 of 85 patents

Patent #TitleCo-InventorsDate
11768619 Voltage based combining of block families for memory devices Michael Sheperek, Shane Nowell 2023-09-26
11762767 Storing highly read data at low impact read disturb pages of a memory device Giuseppina Puzzilli, Vamsi Pavan Rayaprolu, Ashutosh Malshe, James Fitzpatrick, Shyam Sunder Raghunathan +2 more 2023-09-19
11755472 Periodic flush in memory component that is using greedy garbage collection Peter Feeley, Sampath K. Ratnam, Ashutosh Malshe, Christopher S. Hale 2023-09-12
11756594 Memory devices for multiple read operations Eric N. Lee, Jeffrey S. McNeil, Jung Sheng Hoei 2023-09-12
11748013 Grouping blocks based on power cycle and power on time Mustafa N. Kaynak, Jiangang Wu, Sampath K. Ratnam, Sivagnanam Parthasarathy, Peter Feeley +1 more 2023-09-05
11740805 Selective relocation of data of a subset of a data block based on distribution of reliability statistics Ashutosh Malshe, Vamsi Vamsi Rayaprolu, Harish Reddy Singidi 2023-08-29
11740957 Prioritization of error control operations at a memory sub-system Vamsi Pavan Rayaprolu, Harish Reddy Singidi, Ashutosh Malshe, Xiangang Luo 2023-08-29
11735254 Error avoidance based on voltage distribution parameters of blocks Shane Nowell, Steven Michael Kientz, Michael Sheperek, Mustafa N. Kaynak, Larry J. Koudele +1 more 2023-08-22
11726867 Multi-page parity protection with power loss handling Harish Reddy Singidi, Xiangang Luo, Vamsi Pavan Rayaprolu, Ashutosh Malshe 2023-08-15
11727994 Performing threshold voltage offset bin selection by package for memory devices Michael Sheperek, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Larry J. Koudele 2023-08-15
11726874 Storing critical data at a memory system Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Sampath K. Ratnam, Peter Feeley 2023-08-15
11726689 Time-based combining for block families of a memory device Shane Nowell, Michael Sheperek, Vamsi Pavan Rayaprolu 2023-08-15
11720493 Cache management based on memory device over-provisioning Kevin R. Brandt, Peter Feeley, Yun Li, Sampath K. Ratnam, Ashutosh Malshe +2 more 2023-08-08
11721404 Operation of mixed mode blocks Ashutosh Malshe, Preston A. Thomson, Michael G. Miller, Gary F. Besinga, Scott Anthony Stoller +3 more 2023-08-08
11720286 Extended cross-temperature handling in a memory sub-system Vamsi Pavan Rayaprolu, Sampath K. Ratnam, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Shane Nowell +2 more 2023-08-08
11715547 Scan optimization using data selection across wordline of a memory array Violante Moschiano, Sead Zildzic, Junwyn A. Lacsao, Paing Z. Htet 2023-08-01
11709727 Managing error-handling flows in memory devices Shane Nowell, Mustafa N. Kaynak, Sampath K. Ratnam, Peter Feeley, Sivagnanam Parthasarathy +2 more 2023-07-25
11709633 Adjusting scan event thresholds to mitigate memory errors Gianni Stephen Alsasua, Harish Reddy Singidi, Peter Feeley, Ashutosh Malshe, Renato C. Padilla +1 more 2023-07-25
11710527 Mitigating a voltage condition of a memory cell in a memory sub-system Vamsi Pavan Rayaprolu, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy, Qisong Lin +2 more 2023-07-25
11705193 Error avoidance based on voltage distribution parameters Shane Nowell, Steven Michael Kientz, Michael Sheperek, Mustafa N. Kaynak, Larry J. Koudele +1 more 2023-07-18
11705192 Managing read level voltage offsets for low threshold voltage offset bin placements Mustafa N. Kaynak, Michael Sheperek, Shane Nowell 2023-07-18
11704217 Charge loss scan operation management in memory devices Michael Sheperek, Steven Michael Kientz, Shane Nowell, Mustafa N. Kaynak, Larry J. Koudele 2023-07-18
11704179 Regression-based calibration and scanning of data units Vamsi Pavan Rayaprolu, Harish Reddy Singidi, Ashutosh Malshe, Sampath K. Ratnam, Qisong Lin 2023-07-18
11698832 Selective sampling of a data unit during a program erase cycle based on error rate change patterns Harish Reddy Singidi, Ashutosh Malshe, Vamsi Pavan Rayaprolu 2023-07-11
11699491 Double interleaved programming of a memory device in a memory sub-system Phong Sy Nguyen, James Fitzpatrick 2023-07-11