| 11830545 |
Data programming techniques to store multiple bits of data per memory cell with high reliability |
Phong Sy Nguyen |
2023-11-28 |
| 11829245 |
Multi-layer code rate architecture for copyback between partitions with different code rates |
Mustafa N. Kaynak, Kishore Kumar Muchherla, Sivagnanam Parthasarathy, Mark A. Helm |
2023-11-28 |
| 11798627 |
Multi-phased programming with balanced gray coding |
Sergey Anatolievich Gorobets, Xinmiao Zhang |
2023-10-24 |
| 11782841 |
Management of programming mode transitions to accommodate a constant size of data transfer between a host system and a memory sub-system |
Sanjay Subbarao |
2023-10-10 |
| 11775217 |
Adaptive and/or iterative operations in executing a read command to retrieve data from memory cells |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-10-03 |
| 11762599 |
Self adapting iterative read calibration to retrieve data from memory cells |
AbdelHakim S. Alhussien, Sivagnanam Parthasarathy, Patrick R. Khayat |
2023-09-19 |
| 11762767 |
Storing highly read data at low impact read disturb pages of a memory device |
Kishore Kumar Muchherla, Giuseppina Puzzilli, Vamsi Pavan Rayaprolu, Ashutosh Malshe, Shyam Sunder Raghunathan +2 more |
2023-09-19 |
| 11740970 |
Dynamic adjustment of data integrity operations of a memory system based on error rate classification |
Patrick R. Khayat, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy |
2023-08-29 |
| 11735252 |
Multi-level cell programming using optimized multiphase mapping with balanced gray code |
Mostafa El Gamal, Niranjay Ravindran |
2023-08-22 |
| 11726719 |
Compound feature generation in classification of error rate of data retrieved from memory cells |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-08-15 |
| 11699491 |
Double interleaved programming of a memory device in a memory sub-system |
Phong Sy Nguyen, Kishore Kumar Muchherla |
2023-07-11 |
| 11676679 |
Two-layer code with low parity cost for memory sub-systems |
Sanjay Subbarao |
2023-06-13 |
| 11670396 |
Determine bit error count based on signal and noise characteristics centered at an optimized read voltage |
Patrick R. Khayat, Sivagnanam Parthasarathy |
2023-06-06 |
| 11662905 |
Memory system performance enhancements using measured signal and noise characteristics of memory cells |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien, Violante Moschiano |
2023-05-30 |
| 11657886 |
Intelligent proactive responses to operations to read data from memory cells |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-05-23 |
| 11636039 |
Mapping for multi-state programming of memory devices |
Bernie Rub, Mostafa El Gamal, Niranjay Ravindran, Richard David Barndt, Henry Chin +1 more |
2023-04-25 |
| 11587624 |
Coarse calibration based on signal and noise characteristics of memory cells collected in prior calibration operations |
Patrick R. Khayat, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy |
2023-02-21 |
| 11587638 |
Read model of memory cells using information generated during read operations |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-02-21 |
| 11581047 |
Iterative read calibration enhanced according to patterns of shifts in read voltages |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-02-14 |
| 11562793 |
Read soft bits through boosted modulation following reading hard bits |
Sivagnanam Parthasarathy, Patrick R. Khayat, AbdelHakim S. Alhussien |
2023-01-24 |
| 11562801 |
Determine signal and noise characteristics centered at an optimized read voltage |
Patrick R. Khayat, Sivagnanam Parthasarathy |
2023-01-24 |
| 11557361 |
Compute an optimized read voltage |
Patrick R. Khayat, AbdelHakim S. Alhussien, Sivagnanam Parthasarathy |
2023-01-17 |
