VR

Vamsi Pavan Rayaprolu

Micron: 41 patents #5 of 1,593Top 1%
Overall (2023): #435 of 537,848Top 1%
41
Patents 2023

Issued Patents 2023

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDate
11854649 Temperature-compensated time estimate for a block to reach a uniform charge loss state Patrick R. Khayat, Steven Michael Kientz, Sivagnanam Parthasarathy, Mustafa N. Kaynak 2023-12-26
11847051 Memory sub-system logical block address remapping Kishore Kumar Muchherla, Karl D. Schuh, Jiangang Wu, Gil Golov 2023-12-19
11841794 Memory sub-system write sequence track Karl D. Schuh, Jiangang Wu, Kishore Kumar Muchherla 2023-12-12
11837291 Voltage offset bin selection by die group for memory devices Mustafa N. Kaynak, Michael Sheperek, Larry J. Koudele, Shane Nowell 2023-12-05
11836392 Relocating data to low latency memory Kishore Kumar Muchherla, Ashutosh Malshe, Sampath K. Ratnam, Harish Reddy Singidi, Peter Feeley 2023-12-05
11810627 Selective read disturb sampling Kishore Kumar Muchherla, Harish Reddy Singidi, Renato C. Padilla, Ashutosh Malshe, Sampath K. Ratnam 2023-11-07
11810631 Data integrity checks based on voltage distribution metrics Michael Sheperek, Christopher M. Smitchger 2023-11-07
11797216 Read calibration based on ranges of program/erase cycles Giuseppina Puzzilli, Karl D. Schuh, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more 2023-10-24
11797205 Measurement of representative charge loss in a block to determine charge loss state Patrick R. Khayat, Steven Michael Kientz, Sivagnanam Parthasarathy, Mustafa N. Kaynak 2023-10-24
11791000 Valid translation unit count-based memory management Ashutosh Malshe, Kishore Kumar Muchherla 2023-10-17
11782627 Read count scaling factor for data integrity scan Kishore Kumar Muchherla, Ashutosh Malshe, Harish Reddy Singidi, Gianni Stephen Alsasua 2023-10-10
11762767 Storing highly read data at low impact read disturb pages of a memory device Kishore Kumar Muchherla, Giuseppina Puzzilli, Ashutosh Malshe, James Fitzpatrick, Shyam Sunder Raghunathan +2 more 2023-09-19
11756636 Determining threshold values for voltage distribution metrics Christopher M. Smitchger 2023-09-12
11740957 Prioritization of error control operations at a memory sub-system Harish Reddy Singidi, Kishore Kumar Muchherla, Ashutosh Malshe, Xiangang Luo 2023-08-29
11733896 Reliability scan assisted voltage bin selection Shane Nowell, Michael Sheperek 2023-08-22
11726867 Multi-page parity protection with power loss handling Harish Reddy Singidi, Kishore Kumar Muchherla, Xiangang Luo, Ashutosh Malshe 2023-08-15
11727994 Performing threshold voltage offset bin selection by package for memory devices Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Bruce A. Liikanen, Larry J. Koudele 2023-08-15
11726874 Storing critical data at a memory system Sivagnanam Parthasarathy, Sampath K. Ratnam, Peter Feeley, Kishore Kumar Muchherla 2023-08-15
11726689 Time-based combining for block families of a memory device Shane Nowell, Michael Sheperek, Kishore Kumar Muchherla 2023-08-15
11720286 Extended cross-temperature handling in a memory sub-system Sampath K. Ratnam, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Kishore Kumar Muchherla, Shane Nowell +2 more 2023-08-08
11721409 Smart sampling for block family scan Shane Nowell, Michael Sheperek, Steven Michael Kientz 2023-08-08
11715541 Workload adaptive scans for memory sub-systems Renato C. Padilla, Sampath K. Ratnam, Christopher M. Smitchger, Gary F. Besinga, Michael G. Miller +1 more 2023-08-01
11715531 Open block management using storage charge loss margin checking Christopher M. Smitchger, Gary F. Besinga, Renato C. Padilla, Tawalin Opastrakoon, Sampath K. Ratnam +2 more 2023-08-01
11710527 Mitigating a voltage condition of a memory cell in a memory sub-system Kishore Kumar Muchherla, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy, Qisong Lin +2 more 2023-07-25
11704179 Regression-based calibration and scanning of data units Harish Reddy Singidi, Ashutosh Malshe, Sampath K. Ratnam, Qisong Lin, Kishore Kumar Muchherla 2023-07-18