| 11538514 |
Writing scheme for 1TnC ferroelectric memory bit-cell with plate-lines parallel to a bit-line and with individual switches on the plate-lines of the bit-cell |
Rajeev Kumar Dokania, Sasikanth Manipatruni |
2022-12-27 |
|
| 11539368 |
Majority logic gate with input paraelectric capacitors |
Sasikanth Manipatruni, Rafael Rios, Ikenna Odinaka, Robert Menezes, Rajeev Kumar Dokania +1 more |
2022-12-27 |
|
| 11532635 |
High-density low voltage multi-element ferroelectric gain memory bit-cell with pillar capacitors |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-20 |
|
| 11532344 |
Reading scheme for 1TNC ferroelectric memory bit-cell with plate-line parallel to bit-line and with individual switches on plate-lines of the bit-cell |
Rajeev Kumar Dokania, Sasikanth Manipatruni |
2022-12-20 |
|
| 11532342 |
Non-linear polar material based differential multi-memory element bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-20 |
|
| 11527277 |
High-density low voltage ferroelectric memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-13 |
|
| 11527278 |
Non-linear polar material based memory bit-cell with multi-level storage by applying different time pulse widths |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-13 |
|
| 11521667 |
Stacked ferroelectric planar capacitors in a memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-06 |
|
| 11522044 |
Ferroelectric capacitor integrated with logic |
Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh |
2022-12-06 |
|
| 11521953 |
3D stacked ferroelectric compute and memory |
Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh |
2022-12-06 |
|
| 11521668 |
Pulsing scheme for a ferroelectric memory bit-cell with plate-line parallel to word-line to minimize read or write disturb effects |
Rajeev Kumar Dokania, Sasikanth Manipatruni |
2022-12-06 |
|
| 11521666 |
High-density low voltage multi-element ferroelectric gain memory bit-cell with planar capacitors |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-12-06 |
|
| 11514966 |
Non-linear polar material based multi-memory element bit-cell with multi-level storage |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-11-29 |
|
| 11514967 |
Non-linear polar material based differential multi-memory element gain bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-11-29 |
|
| 11509308 |
Sequential circuit without feedback or memory element |
Ikenna Odinaka, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni |
2022-11-22 |
|
| 11502691 |
Method for using and forming low power ferroelectric based majority logic gate adder |
Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Gaurav Thareja +1 more |
2022-11-15 |
|
| 11502696 |
In-memory analog neural cache |
Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more |
2022-11-15 |
$16,955,000 |
| 11501813 |
Method of forming stacked ferroelectric non- planar capacitors in a memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-11-15 |
|
| 11482528 |
Pillar capacitor and method of fabricating such |
Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh |
2022-10-25 |
|
| 11482990 |
Vectored sequential circuit with ferroelectric or paraelectric material |
Ikenna Odinaka, Rajeev Kumar Dokania, Rafael Rios, Sasikanth Manipatruni |
2022-10-25 |
|
| 11482270 |
Pulsing scheme for a ferroelectric memory bit-cell to minimize read or write disturb effect and refresh logic |
Rajeev Kumar Dokania, Sasikanth Manipatruni |
2022-10-25 |
|
| 11451232 |
Majority logic gate based flip-flop with non-linear polar material |
Sasikanth Manipatruni, Yuan-Sheng Fang, Robert Menezes, Rajeev Kumar Dokania, Ramamoorthy Ramesh |
2022-09-20 |
|
| 11430861 |
Ferroelectric capacitor and method of patterning such |
Gaurav Thareja, Sasikanth Manipatruni, Rajeev Kumar Dokania, Ramamoorthy Ramesh |
2022-08-30 |
|
| 11423967 |
Stacked ferroelectric non-planar capacitors in a memory bit-cell |
Rajeev Kumar Dokania, Noriyuki Sato, Tanay Gosavi, Pratyush Pandey, Debo Olaosebikan +1 more |
2022-08-23 |
|
| 11418197 |
Majority logic gate having paraelectric input capacitors and a local conditioning mechanism |
Rajeev Kumar Dokania, Rafael Rios, Ikenna Odinaka, Robert Menezes, Ramamoorthy Ramesh +1 more |
2022-08-16 |
|
