Issued Patents 2022
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11462631 | Sublithography gate cut physical unclonable function | Kangguo Cheng, Fee Li Lie, Gauri Karve, Marc A. Bergendahl, John R. Sporre | 2022-10-04 |
| 11430753 | Iterative formation of damascene interconnects | Sean P. Kilcoyne, Michael V. Liguori, Michael J. Rondon | 2022-08-30 |
| 11424367 | Wrap-around contacts including localized metal silicide | Julien Frougier, Yann Mignot, Andrew M. Greene | 2022-08-23 |
| 11393869 | Wafer level shim processing | Jeffery H. Burkhart, Sean P. Kilcoyne | 2022-07-19 |
| 11316029 | Sacrificial fin for contact self-alignment | Yann Mignot, Indira Seshadri, Su Chen Fan, Christopher J. Waskiewicz | 2022-04-26 |
| 11257681 | Using a same mask for direct print and self-aligned double patterning of nanosheets | Stuart A. Sieg, Daniel James Dechene | 2022-02-22 |
| 11251287 | Self-aligned uniform bottom spacers for VTFETS | Ruilong Xie, Hemanth Jagannathan, Jay William Strane | 2022-02-15 |
| 11245027 | Bottom source/drain etch with fin-cut-last-VTFET | Tao Li, Indira Seshadri, Nelson Felix | 2022-02-08 |
| 11239316 | Semiconductor device and method of forming the semiconductor device | Marc A. Bergendahl, Gauri Karve, Fee Li Lie, Robert R. Robison, John R. Sporre +1 more | 2022-02-01 |
| 11222813 | Method of manufacturing wafer level low melting temperature interconnections | Sean P. Kilcoyne, George Grama | 2022-01-11 |