Issued Patents 2020
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879288 | Reflector for backside illuminated (BSI) image sensor | Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Sheng-Chan Li | 2020-12-29 |
| 10879236 | Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device | Karthick Murukesan, Wen-Chih Chiang, Chiu-Hua Chung, Chun Lin Tsai, Shiuan-Jeng Lin +4 more | 2020-12-29 |
| 10847650 | Semiconductor structure and associated fabricating method | Jia-Rui Lee, Yi-Chun Lin | 2020-11-24 |
| 10790240 | Metal line design for hybrid-bonding application | Kuan-Liang Liu, Pao-Tung Chen | 2020-09-29 |
| 10734285 | Bonding support structure (and related process) for wafer stacking | Sheng-Chan Li, Cheng-Hsien Chou, Cheng-Yuan Tsai, Chih-Hui Huang | 2020-08-04 |
| 10727218 | Seal ring structures and methods of forming same | Kuan-Liang Liu, Wen-De Wang, Yung-Lung Lin | 2020-07-28 |
| 10727205 | Hybrid bonding technology for stacking integrated circuits | Ching-Chun Wang, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Min-Feng Kao +3 more | 2020-07-28 |
| 10679987 | Bootstrap metal-oxide-semiconductor (MOS) device integrated with a high voltage MOS (HVMOS) device and a high voltage junction termination (HVJT) device | Karthick Murukesan, Wen-Chih Chiang, Chiu-Hua Chung, Chun Lin Tsai, Shiuan-Jeng Lin +4 more | 2020-06-09 |
| 10535730 | High voltage metal-oxide-semiconductor (HVMOS) device integrated with a high voltage junction termination (HVJT) device | Karthick Murukesan, Wen-Chih Chiang, Chun Lin Tsai, Ker Hsiao Huo, Po-Chih Chen +5 more | 2020-01-14 |