Issued Patents 2020
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10586737 | Method and structure for forming vertical transistors with shared gates and separate gates | Kangguo Cheng, Juntao Li, Peng Xu | 2020-03-10 |
| 10573566 | Fabrication of fin field effect transistor complementary metal-oxide-semiconductor devices with uniform hybrid channels | Kangguo Cheng, Peng Xu, Jie Yang | 2020-02-25 |
| 10566445 | Gate spacer and inner spacer formation for nanosheet transistors having relatively small space between gates | Kangguo Cheng, Nicolas Loubet, Xin Miao, Wenyu Xu, Chen Zhang | 2020-02-18 |
| 10553445 | Stacked nanowires | Kangguo Cheng, Juntao Li, Xin Miao | 2020-02-04 |
| 10553682 | Vertical transistors with multiple gate lengths | Kangguo Cheng, Peng Xu, Zheng Xu | 2020-02-04 |
| 10546788 | Dual channel FinFETs having uniform fin heights | Kangguo Cheng, Peng Xu, Jie Yang | 2020-01-28 |
| 10541128 | Method for making VFET devices with ILD protection | Kangguo Cheng, Juntao Li, Peng Xu | 2020-01-21 |
| 10541176 | Vertical silicon/silicon-germanium transistors with multiple threshold voltages | Kangguo Cheng, Juntao Li, Peng Xu | 2020-01-21 |
| 10535755 | Closely packed vertical transistors with reduced contact resistance | Kangguo Cheng, Juntao Li, Peng Xu | 2020-01-14 |