Issued Patents 2019
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10516051 | FinFET and method of fabrication thereof | Kuo-Cheng Ching, Kuan-Ting Pan, Ching-Wei Tsai, Ying-Keung Leung, Chih-Hao Wang | 2019-12-24 |
| 10516049 | Multi-gate device and method of fabrication thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang, Wai-Yi Lien, Ying-Keung Leung | 2019-12-24 |
| 10515857 | Method for manufacturing semiconductor devices | Ling-Yen Yeh, Wilman Tsai | 2019-12-24 |
| 10510744 | Vertical nanowire transistor for input/output structure | Jean-Pierre Colinge, Ta-Pen Guo | 2019-12-17 |
| 10505025 | Tunnel field-effect transistor and method for forming the same | Gerben Doornbos, Peter Ramvall, Matthias Passlack | 2019-12-10 |
| 10505040 | Method of manufacturing a semiconductor device having a gate with ferroelectric layer | Chia-Cheng Ho, Ming-Shiang Lin, Cheng-Yi Peng, Chun-Chieh Lu, Chih-Sheng Chang | 2019-12-10 |
| 10497792 | Contacts for highly scaled transistors | Chung-Cheng Wu, Chia-Hao Chang, Chih-Hao Wang, Jean-Pierre Colinge, Chun-Hsiung Lin +2 more | 2019-12-03 |
| 10490631 | Semiconductor device and fabricating method thereof | Chun-Chieh Lu, Meng-Hsuan Hsiao, Tung Ying Lee, Ling-Yen Yeh, Chih-Sheng Chang | 2019-11-26 |
| 10461190 | Method for reducing contact resistance in semiconductor structures | Jean-Pierre Colinge | 2019-10-29 |
| 10461179 | Devices having a semiconductor material that is semimetal in bulk and methods of forming the same | Jean-Pierre Colinge, Yee-Chia Yeo | 2019-10-29 |
| 10453522 | SRAM with stacked bit cells | Chih-Hao Wang, Jean-Pierre Colinge, Ta-Pen Guo | 2019-10-22 |
| 10453961 | Structure and method for SRAM FinfET device | Kuo-Cheng Ching, Ka-Hing Fung, Zhiqiang Wu | 2019-10-22 |
| 10361270 | Nanowire MOSFET with different silicides on source and drain | Jean-Pierre Colinge, Cheng-Tung Lin, Kuo-Cheng Ching | 2019-07-23 |
| 10361126 | System and method for widening fin widths for small pitch FinFET devices | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang, Ying-Keung Leung | 2019-07-23 |
| 10325989 | Semiconductor device with silicide | Jean-Pierre Colinge, Kuo-Cheng Ching, Ta-Pen Guo | 2019-06-18 |
| 10294101 | Semiconductor arrangement with one or more semiconductor columns | Jean-Pierre Colinge, Ta-Pen Guo, Chih-Hao Wang | 2019-05-21 |
| 10290737 | Semiconductor arrangement with one or more semiconductor columns | Jean-Pierre Colinge, Kuo-Cheng Ching, Ta-Pen Guo | 2019-05-14 |
| 10276697 | Negative capacitance FET with improved reliability performance | Chun-Chieh Lu, Cheng-Yi Peng, Chien-Hsing Lee, Ling-Yen Yeh, Chih-Sheng Chang | 2019-04-30 |
| 10269901 | Semiconductor liner of semiconductor device | Kuo-Cheng Ching, Chih-Hao Wang | 2019-04-23 |
| 10269965 | Multi-gate semiconductor device and method for forming the same | I-Sheng Chen, Tzu-Chiang Chen, Cheng-Hsien Wu, Ling-Yen Yeh | 2019-04-23 |
| 10269572 | Semiconductor device and manufacturing method thereof | Jean-Pierre Colinge | 2019-04-23 |
| 10191694 | 3D cross-bar nonvolatile memory | Jean-Pierre Colinge, Ta-Pen Guo | 2019-01-29 |
| 10170404 | Monolithic 3D integration inter-tier vias insertion scheme and associated layout structure | Ta-Pen Guo, Jean-Pierre Colinge, Yi-Hsiung Lin | 2019-01-01 |