Issued Patents 2019
Showing 26–33 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10249568 | Method for making semiconductor device with stacked analog components in back end of line (BEOL) regions | — | 2019-04-02 |
| 10247881 | Hybrid photonic and electronic integrated circuits | — | 2019-04-02 |
| 10242911 | Forming self-aligned vias and air-gaps in semiconductor fabrication | Lawrence A. Clevenger, Carl Radens | 2019-03-26 |
| 10242862 | Post-CMP hybrid wafer cleaning technique | — | 2019-03-26 |
| 10229999 | Methods of forming upper source/drain regions on a vertical transistor device | Xusheng Wu, Haigou Huang, Jiehui Shu | 2019-03-12 |
| 10217846 | Vertical field effect transistor formation with critical dimension control | Ruilong Xie, Steven Bentley, Min Gyu Sung, Chanro Park, Steven R. Soss +8 more | 2019-02-26 |
| 10211257 | High density resistive random access memory (RRAM) | Qing Liu | 2019-02-19 |
| 10199505 | Transistors incorporating metal quantum dots into doped source and drain regions | — | 2019-02-05 |