| 10505111 |
Confined phase change memory with double air gap |
Balasubramanian Pranatharthiharan, Wei Wang |
2019-12-10 |
| 10490454 |
Minimize middle-of-line contact line shorts |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-11-26 |
| 10468498 |
Vertical fin bipolar junction transistor with high germanium content silicon germanium base |
Seyoung Kim, Choonghyun Lee, Soon-Cheon Seo |
2019-11-05 |
| 10453844 |
Techniques for enhancing vertical gate-all-around FET performance |
Choonghyun Lee, Soon-Cheon Seo, Seyoung Kim |
2019-10-22 |
| 10396200 |
Method and structure of improving contact resistance for passive and long channel devices |
Soon-Cheon Seo, Balasubramanian Pranatharthiharan, Charan V. Surisetty |
2019-08-27 |
| 10396126 |
Resistive memory device with electrical gate control |
Seyoung Kim, Takashi Ando, Choonghyun Lee, Soon-Cheon Seo |
2019-08-27 |
| 10381074 |
Differential weight reading of an analog memory element in crosspoint array utilizing current subtraction transistors |
Seyoung Kim, Soon-Cheon Seo, Choonghyun Lee |
2019-08-13 |
| 10381458 |
Semiconductor device replacement metal gate with gate cut last in RMG |
Andrew M. Greene, Balasubramanian Pranatharthi Haran, Charan V. Surisetty |
2019-08-13 |
| 10361203 |
FET trench dipole formation |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-07-23 |
| 10355080 |
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-07-16 |
| 10347633 |
Spacer for trench epitaxial structures |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-07-09 |
| 10347456 |
Vertical vacuum channel transistor with minimized air gap between tip and gate |
Choonghyun Lee, Soon-Cheon Seo, Seyoung Kim |
2019-07-09 |
| 10347632 |
Forming spacer for trench epitaxial structures |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-07-09 |
| 10332971 |
Replacement metal gate stack for diffusion prevention |
Takashi Ando, Johnathan E. Faltermeier, Su Chen Fan, Sivananda K. Kanakasabapathy, Tenko Yamashita |
2019-06-25 |
| 10325848 |
Self-aligned local interconnect technology |
Andrew M. Greene, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty, Ruilong Xie |
2019-06-18 |
| 10325820 |
Source and drain isolation for CMOS nanosheet with one block mask |
Soon-Cheon Seo, Choonghyun Lee |
2019-06-18 |
| 10297668 |
Vertical transport fin field effect transistor with asymmetric channel profile |
Choonghyun Lee, Brent A. Anderson, Soon-Cheon Seo |
2019-05-21 |
| 10256296 |
Middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack |
Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Charan V. Surisetty |
2019-04-09 |
| 10249624 |
Semiconductor structure containing low-resistance source and drain contacts |
Balasubramanian Pranatharthiharan, Charan V. Surisetty |
2019-04-02 |
| 10236253 |
Self-aligned local interconnect technology |
Andrew M. Greene, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty, Ruilong Xie |
2019-03-19 |
| 10229852 |
Self-aligned low dielectric constant gate cap and a method of forming the same |
Balasubramanian Pranatharthiharan, Charan V. Surisetty |
2019-03-12 |
| 10177240 |
FinFET device formed by a replacement metal-gate method including a gate cut-last step |
Andrew M. Greene, Balasubramanian Pranatharthi Haran, Charan V. Surisetty |
2019-01-08 |
