Issued Patents 2019
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10522510 | Heterogeneous integration of ultrathin functional block by solid phase adhesive and selective transfer | Jacob Jensen, Patrick Morrow, Paul B. Fischer | 2019-12-31 |
| 10490449 | Techniques for revealing a backside of an integrated circuit device, and associated configurations | Il-Seok Son, Colin T. Carver, Paul B. Fischer, Patrick Morrow | 2019-11-26 |
| 10453679 | Methods and devices integrating III-N transistor circuitry with Si transistor circuitry | Sansaptak Dasgupta, Marko Radosavljevic, Han Wui Then, Ravi Pillarisetty, Patrick Morrow +3 more | 2019-10-22 |
| 10439057 | Multi-gate high electron mobility transistors and methods of fabrication | Sansaptak Dasgupta, Alejandro X. Levander, Patrick Morrow | 2019-10-08 |
| 10367070 | Methods of forming backside self-aligned vias and structures formed thereby | Patrick Morrow, Mauro J. Kobrinsky, Il-Seok Son, Paul B. Fischer | 2019-07-30 |
| 10361090 | Vertical channel transistors fabrication process by selective subtraction of a regular grid | Patrick Morrow, Donald W. Nelson | 2019-07-23 |
| 10297592 | Monolithic three-dimensional (3D) ICs with local inter-level interconnects | Patrick Morrow, M. Clair Webb, Donald W. Nelson | 2019-05-21 |
| 10236282 | Partial layer transfer system and method | Patrick Morrow, Il-Seok Son, Rajashree Baskaran, Paul B. Fischer | 2019-03-19 |
| 10186484 | Metal on both sides with clock gated-power and signal routing underneath | Donald W. Nelson, Patrick Morrow | 2019-01-22 |