Issued Patents 2018
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10146141 | Lithography process and system with enhanced overlay quality | Chi-Cheng Hung, Yung-Sung Yen, Chun-Kuang Chen, Ru-Gun Liu, Tsai-Sheng Gau +6 more | 2018-12-04 |
| 10114291 | Grafting agent for forming spacer layer | Ya-Ling Cheng, Ching-Yu Chang, Chien-Chih Chen, Chun-Kuang Chen, Siao-Shan Wang | 2018-10-30 |
| 10074657 | Method of manufacturing fins and semiconductor device which includes fins | Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Jiann-Tyng Tzeng +3 more | 2018-09-11 |
| 10056265 | Directed self-assembly process with size-restricted guiding patterns | Ming-Huei Weng, Kuan-Hsin Lo, Chi-Cheng Hung | 2018-08-21 |
| 10049918 | Directional patterning methods | Chi-Cheng Hung, Ru-Gun Liu, Ta-Ching Yu, Yung-Sung Yen, Ziwei Fang +3 more | 2018-08-14 |
| 10032639 | Methods for improved critical dimension uniformity in a semiconductor device fabrication process | Chi-Cheng Hung, Chun-Kuang Chen, De-Fang Chen, Yu-Tien Shen | 2018-07-24 |
| 9997994 | Totem-pole power factor corrector and current-sampling unit thereof | Cheng Luo, Chia-An Yeh | 2018-06-12 |
| 9991132 | Lithographic technique incorporating varied pattern materials | Chin-Yuan Tseng, Chi-Cheng Hung, Chun-Kuang Chen, De-Fang Chen, Ru-Gun Liu +1 more | 2018-06-05 |
| 9985541 | Feed forward controlling circuit and method for voltage ripple restraint | Cheng Luo | 2018-05-29 |